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Subject: Re: [PATCH v2 2/2] mm/mmu_gather: send tlb_remove_table_smp_sync IPI
 only to MM CPUs
From:   Nadav Amit <nadav.amit@gmail.com>
In-Reply-To: <20230620144618.125703-3-ypodemsk@redhat.com>
Date:   Wed, 21 Jun 2023 11:02:05 -0700
Cc:     mtosatti@redhat.com, ppandit@redhat.com,
        David Hildenbrand <david@redhat.com>,
        "Russell King (Oracle)" <linux@armlinux.org.uk>,
        Michael Ellerman <mpe@ellerman.id.au>,
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References: <20230620144618.125703-1-ypodemsk@redhat.com>
 <20230620144618.125703-3-ypodemsk@redhat.com>
To:     Yair Podemsky <ypodemsk@redhat.com>
Precedence: bulk

>=20
> On Jun 20, 2023, at 7:46 AM, Yair Podemsky <ypodemsk@redhat.com> =
wrote:
>=20
> @@ -1525,7 +1525,7 @@ static void collapse_and_free_pmd(struct =
mm_struct *mm, struct vm_area_struct *v
> 				addr + HPAGE_PMD_SIZE);
> 	mmu_notifier_invalidate_range_start(&range);
> 	pmd =3D pmdp_collapse_flush(vma, addr, pmdp);
> -	tlb_remove_table_sync_one();
> +	tlb_remove_table_sync_one(mm);

Can=E2=80=99t pmdp_collapse_flush() have one additional argument =
=E2=80=9Cfreed_tables=E2=80=9D
that it would propagate, for instance on x86 to flush_tlb_mm_range() ?
Then you would not need tlb_remove_table_sync_one() to issue an =
additional
IPI, no?

It just seems that you might still have 2 IPIs in many cases instead of
one, and unless I am missing something, I don=E2=80=99t see why.