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Wed, 21 Jun 2023 22:55:05 -0500 From: Terry Bowman To: , , , , , , , CC: , , , Subject: [PATCH v6 13/27] cxl/mem: Prepare for early RCH dport component register setup Date: Wed, 21 Jun 2023 22:51:12 -0500 Message-ID: <20230622035126.4130151-14-terry.bowman@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230622035126.4130151-1-terry.bowman@amd.com> References: <20230622035126.4130151-1-terry.bowman@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT077:EE_|LV8PR12MB9109:EE_ X-MS-Office365-Filtering-Correlation-Id: d5c29e6e-a1b6-4476-db99-08db72d4772e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: pA5VQX5d76RgfQpbyvQxpGcsF3qRo61NOCCl1Z/+9n9EDCtfBhXSd43Hi4x7bl236SH+RuzBrvFIDt70h2ZcfCbdKnKtaQYLdUDRB4Hz+JXlJLpSygB/atdmcaahZOWJTdiORuZ0XFzGxmBqRULSYX3v60IQ6jSflem8QZkknyDXtUe4i/I+e6NPAMHRvkH26qH+BUBSLWEHV1l1rK4DsQdd6xCEcoC/FTER89VuskzfOGyqvNwlcOu3aTTn/0VEMRSZM9CtrhNLuLuSPGsmtZz9upcM5gq9NClCW2HKGvGMyXfcUaFxq4dVQI7pMw8GfQrqksHW04jIsr+UexfY9NBWV1tdrJ5MR5tYCn4fc07Xlp11x6aCwTRccUnjG5VTidrR7blkwFQbhLfAdDyD3gtTbIgISHvf3O3slNP8XbP6l/4N7Zf3E8I6poeK2GVLELhxd4vkpHHrW7gPWINAEnBHZIIvNcldeT/yZI9qBixxeigZ+mO6jpnUid9+g8FHqKztYj9fcma6N9RkvPFYQ4tagGmP4uAI3MUyFQW1qOYsLnSmE8JoeLWNWQArxj1ffef4UT/qaqlUcwSTPQu6VZoO+fTDS43omA4y/mHZgIWXyh+W6J67vDqy/mSFbaJeesTOTwTSpR4Voj0W7sUJcTstNEaodIYQ2apiTmEmU3ORK5sZHjvxHvAuaBT1NIE1tHqHTWbLE/njQQF4VxrdJ51ztjoyRJztSO9puAoGxrgeadETMIWLGh2sYgLqlow5fhM1GtMIM1cl6yWYLUUSKw== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(346002)(396003)(136003)(39860400002)(376002)(451199021)(36840700001)(46966006)(40470700004)(6666004)(40460700003)(2906002)(426003)(336012)(16526019)(186003)(2616005)(36860700001)(47076005)(83380400001)(70206006)(70586007)(110136005)(7696005)(54906003)(316002)(7416002)(5660300002)(8936002)(26005)(478600001)(44832011)(1076003)(41300700001)(8676002)(40480700001)(81166007)(82740400003)(356005)(36756003)(82310400005)(86362001)(4326008)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Jun 2023 03:55:06.0937 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d5c29e6e-a1b6-4476-db99-08db72d4772e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT077.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9109 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO,SPF_HELO_PASS, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Robert Richter In order to move the RCH dport component register setup to cxl_pci the base address must be stored in CXL device state (cxlds) for both modes, RCH and VH. Store it in cxlds->component_reg_phys and use it for endpoint creation. Signed-off-by: Robert Richter Signed-off-by: Terry Bowman --- drivers/cxl/mem.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c index 4cc461c22b8b..7638a7f8f333 100644 --- a/drivers/cxl/mem.c +++ b/drivers/cxl/mem.c @@ -51,7 +51,6 @@ static int devm_cxl_add_endpoint(struct device *host, struct cxl_memdev *cxlmd, struct cxl_port *parent_port = parent_dport->port; struct cxl_dev_state *cxlds = cxlmd->cxlds; struct cxl_port *endpoint, *iter, *down; - resource_size_t component_reg_phys; int rc; /* @@ -72,11 +71,11 @@ static int devm_cxl_add_endpoint(struct device *host, struct cxl_memdev *cxlmd, * typical register locator mechanism. */ if (parent_dport->rch && cxlds->component_reg_phys == CXL_RESOURCE_NONE) - component_reg_phys = + cxlds->component_reg_phys = cxl_rcd_component_reg_phys(&cxlmd->dev, parent_dport); - else - component_reg_phys = cxlds->component_reg_phys; - endpoint = devm_cxl_add_port(host, &cxlmd->dev, component_reg_phys, + + endpoint = devm_cxl_add_port(host, &cxlmd->dev, + cxlds->component_reg_phys, parent_dport); if (IS_ERR(endpoint)) return PTR_ERR(endpoint); -- 2.34.1