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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next 1/6] net: dsa: vsc73xx: convert to PHYLINK Message-ID: References: <20230621191302.1405623-1-paweldembicki@gmail.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230621191302.1405623-1-paweldembicki@gmail.com> X-ClientProxiedBy: AS4PR09CA0011.eurprd09.prod.outlook.com (2603:10a6:20b:5e0::13) To PH0PR13MB4842.namprd13.prod.outlook.com (2603:10b6:510:78::6) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH0PR13MB4842:EE_|MW3PR13MB3914:EE_ X-MS-Office365-Filtering-Correlation-Id: 0d08cac4-479f-4276-0359-08db72f3176c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: mRSbleJhcrrQ/2C28oi/E+pLzOU7BBx72zYM3hB678bpV3A2yhetoZ1NiNp9bZX29POAq3Z61bhou75klxH9ZJuPZi/gXgvCOf6Bg19EZTVK9n/ixQVpAvcSO+MsF77+4OuY+e28gf4hel7BnoA3n068JbucE+qUcmbwMK+HmZi00J/io/dRubcDVqWIKtGiZBvF/jF7dp75RsGe8UELcLtM+RoUSP+gF0toUcOtahMJ8XSjEWwoc/DjoNSp21wVrHVGWejXFisy4BzAD4G15/LfOkA1iJPb4XdrSFPVmQn3xumUqeFru1T8jro3h0z/v5Tgb255JnaZKnoOQivMsNQJnwk2DpSCYHD1P1dyKyo8WCVqFxZ2nzEfz0l5GWPibMffdOt2ubjOzAJKQYy9hYVl3029NehV1NpDKoQFrenZ8W65HJIIxWiPJvQVOp8m2bJe57MooNDB5FBiyhf/DvS/+CrtJBQFnz2GBCV+fd/bhThV8/aCJMUn7yLphxlZizaWGLLUW5fjBjatP+iWn9Z6N0QSteCtFw5WCnejC4EiV7hJlIW9cWHKFQAqbgClQTj5SUjPtLRBCNwqDorrP+rU0i+lMizo5eujMdS4n7I= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PH0PR13MB4842.namprd13.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230028)(4636009)(396003)(136003)(39840400004)(366004)(346002)(376002)(451199021)(38100700002)(6486002)(83380400001)(6506007)(186003)(2616005)(7416002)(44832011)(5660300002)(2906002)(41300700001)(8676002)(8936002)(4326008)(6666004)(36756003)(478600001)(66556008)(6512007)(66946007)(66476007)(6916009)(316002)(86362001)(54906003);DIR:OUT;SFP:1102; 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> + u32 val; > > + switch (speed) { > + case SPEED_1000: > /* Set up default for internal port or external RGMII */ > - if (phydev->interface == PHY_INTERFACE_MODE_RGMII) > + if (interface == PHY_INTERFACE_MODE_RGMII) > val = VSC73XX_MAC_CFG_1000M_F_RGMII; > else > val = VSC73XX_MAC_CFG_1000M_F_PHY; > - vsc73xx_adjust_enable_port(vsc, port, phydev, val); > - } else if (phydev->speed == SPEED_100) { > - if (phydev->duplex == DUPLEX_FULL) { > - val = VSC73XX_MAC_CFG_100_10M_F_PHY; > - dev_dbg(vsc->dev, > - "port %d: 100 Mbit full duplex mode\n", > - port); > - } else { > - val = VSC73XX_MAC_CFG_100_10M_H_PHY; > - dev_dbg(vsc->dev, > - "port %d: 100 Mbit half duplex mode\n", > - port); > - } > - vsc73xx_adjust_enable_port(vsc, port, phydev, val); > - } else if (phydev->speed == SPEED_10) { > - if (phydev->duplex == DUPLEX_FULL) { > + break; > + case SPEED_100: > + case SPEED_10: > + if (duplex == DUPLEX_FULL) > val = VSC73XX_MAC_CFG_100_10M_F_PHY; > - dev_dbg(vsc->dev, > - "port %d: 10 Mbit full duplex mode\n", > - port); > - } else { > + else > val = VSC73XX_MAC_CFG_100_10M_H_PHY; > - dev_dbg(vsc->dev, > - "port %d: 10 Mbit half duplex mode\n", > - port); > - } > - vsc73xx_adjust_enable_port(vsc, port, phydev, val); > - } else { > - dev_err(vsc->dev, > - "could not adjust link: unknown speed\n"); > + break; > } > > /* Enable port (forwarding) in the receieve mask */ > vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ANALYZER, 0, > VSC73XX_RECVMASK, BIT(port), BIT(port)); > + vsc73xx_adjust_enable_port(vsc, port, val); Hi Pawel, GCC 12.3.0 [1] reports that val may now be uninitialised at this point, and in turn used uninitialised in vsc73xx_adjust_enable_port. In function 'vsc73xx_adjust_enable_port', inlined from 'vsc73xx_phylink_mac_link_up' at drivers/net/dsa/vitesse-vsc73xx-core.c:891:2: drivers/net/dsa/vitesse-vsc73xx-core.c:725:13: warning: 'val' may be used uninitialized [-Wmaybe-uninitialized] 725 | val |= VSC73XX_MAC_CFG_RESET; | ^ drivers/net/dsa/vitesse-vsc73xx-core.c: In function 'vsc73xx_phylink_mac_link_up': drivers/net/dsa/vitesse-vsc73xx-core.c:869:13: note: 'val' was declared here 869 | u32 val; | ^~~ ...