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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Michal Simek , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/1] net: axienet: Move reset before DMA detection Message-ID: References: <20230621112630.154373-1-fido_max@inbox.ru> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230621112630.154373-1-fido_max@inbox.ru> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Wed, Jun 21, 2023 at 01:26:30PM CEST, fido_max@inbox.ru wrote: >DMA detection will fail if axinet was started before (by boot loader, >boot ROM, etc). In this state axinet will not start properly. >So move axinet reset before DMA detection. > >Signed-off-by: Maxim Kochetkov You are missing a "Fixes:" tag here pointing out to the patch that introduced the issue. >--- > drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > >diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c >index 3e310b55bce2..734822321e0a 100644 >--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c >+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c >@@ -2042,6 +2042,11 @@ static int axienet_probe(struct platform_device *pdev) > goto cleanup_clk; > } > >+ /* Reset core now that clocks are enabled, prior to accessing MDIO */ >+ ret = __axienet_device_reset(lp); >+ if (ret) >+ goto cleanup_clk; >+ > /* Autodetect the need for 64-bit DMA pointers. > * When the IP is configured for a bus width bigger than 32 bits, > * writing the MSB registers is mandatory, even if they are all 0. >@@ -2096,11 +2101,6 @@ static int axienet_probe(struct platform_device *pdev) > lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD; > lp->coalesce_usec_tx = XAXIDMA_DFT_TX_USEC; > >- /* Reset core now that clocks are enabled, prior to accessing MDIO */ >- ret = __axienet_device_reset(lp); >- if (ret) >- goto cleanup_clk; >- > ret = axienet_mdio_setup(lp); > if (ret) > dev_warn(&pdev->dev, >-- >2.40.1 > >