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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MN0PR12MB5953.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 56dc5bb2-185b-4db6-f0d3-08db73554266 X-MS-Exchange-CrossTenant-originalarrivaltime: 22 Jun 2023 19:17:02.6449 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: qjvA2Ds5otSIDLv0IqbOyW4zcJL0h5oE34xEny48uRSVbDMi/JXEqv2Q65VyieXx X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4488 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Rob Herring > Sent: Tuesday, June 20, 2023 10:34 PM > To: Pandey, Radhey Shyam > Cc: andersson@kernel.org; mathieu.poirier@linaro.org; > krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org; Simek, Michal > ; Levinsky, Ben ; Shah, > Tanmay ; linux-remoteproc@vger.kernel.org; > devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux- > kernel@vger.kernel.org; git (AMD-Xilinx) > Subject: Re: [PATCH] dt-bindings: remoteproc: add Tightly Coupled Memory > (TCM) bindings >=20 > On Fri, Jun 16, 2023 at 06:04:25PM +0530, Radhey Shyam Pandey wrote: > > Introduce bindings for TCM memory address space on AMD-xilinx Zynq > > UltraScale+ platform. As of now TCM addresses are hardcoded in xilinx > > remoteproc driver. This binding will help in defining TCM in > > device-tree and make it's access platform agnostic and data-driven from > the driver. > > > > Tightly-coupled memories(TCMs) are low-latency memory that provides > > predictable instruction execution and predictable data load/store > > timing. Each Cortex-R5F processor contains two 64-bit wide 64 KB > > memory banks on the ATCM and BTCM ports, for a total of 128 KB of > memory. > > > > In split mode, TCM resources(reg, ranges and power-domain) are > > documented in each R5 node and in lockstep mode TCM resources are > > documented in any of the R5 node. > > > > It also extends the examples for TCM split and lockstep modes. > > > > Signed-off-by: Radhey Shyam Pandey > > --- > > The inspiration for integrating TCM nodes in R5 nodes is taken from > > "5ee79c2ed5bd dt-bindings: remoteproc: Add bindings for R5F subsystem > > on TI K3 SoCs".Once the binding is reviewed/accepted will send out > > driver changes in follow-up series. > > --- > > .../remoteproc/xlnx,zynqmp-r5fss.yaml | 86 +++++++++++++++++-- > > 1 file changed, 81 insertions(+), 5 deletions(-) > > > > diff --git > > a/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp- > r5fss.yaml > > b/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp- > r5fss.yaml > > index 9f677367dd9f..0bc3a8bb8374 100644 > > --- > > a/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp- > r5fss.yaml > > +++ b/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp- > r5fss.y > > +++ aml > > @@ -20,6 +20,12 @@ properties: > > compatible: > > const: xlnx,zynqmp-r5fss > > > > + "#address-cells": > > + const: 1 > > + > > + "#size-cells": > > + const: 1 >=20 > If these are translatable addresses, then you are missing 'ranges'. Thanks, will add ranges property in v2. + ranges: + description: | + Standard ranges definition providing address translations for + local R5F TCM address spaces to bus addresses. >=20 > > + > > xlnx,cluster-mode: > > $ref: /schemas/types.yaml#/definitions/uint32 > > enum: [0, 1, 2] > > @@ -37,7 +43,7 @@ properties: > > 2: single cpu mode > > > > patternProperties: > > - "^r5f-[a-f0-9]+$": > > + "^r5f(.*)+$": >=20 > That's just '^r5f'. If adding a unit-address is what you want then make t= he > regex define that: "^r5f(@[0-9a-f]+|-[a-f0-9]+)$" Will use this regex in v2. >=20 > > type: object > > description: | > > The RPU is located in the Low Power Domain of the Processor > Subsystem. > > @@ -54,8 +60,27 @@ patternProperties: > > compatible: > > const: xlnx,zynqmp-r5f > > > > + "#address-cells": > > + const: 1 > > + > > + "#size-cells": > > + const: 1 >=20 > These (and ranges) apply to child nodes, but you don't have any at this l= evel. Will drop address-cells and size-cells from core(xlnx,zynqmp-r5f) node and address it in v2. >=20 > > + > > + reg: > > + items: > > + - description: Address and Size of the ATCM internal memory = region > > + - description: Address and Size of the BTCM internal memory > > + region > > + > > + reg-names: > > + items: > > + - const: atcm > > + - const: btcm > > + > > + ranges: true > > + > > power-domains: > > - maxItems: 1 > > + minItems: 1 > > + maxItems: 3 > > > > mboxes: > > minItems: 1 > > @@ -112,13 +137,64 @@ additionalProperties: false > > > > examples: > > - | > > + #include > > + > > + //Split mode configuration > > + remoteproc { > > + compatible =3D "xlnx,zynqmp-r5fss"; > > + xlnx,cluster-mode =3D <0>; > > + > > + #address-cells =3D <1>; > > + #size-cells =3D <1>; > > + r5f_0: r5f@ffe00000 { > > + compatible =3D "xlnx,zynqmp-r5f"; > > + #address-cells =3D <1>; > > + #size-cells =3D <1>; > > + reg =3D <0xffe00000 0x10000>, <0xffe20000 0x10000>; > > + reg-names =3D "atcm", "btcm"; > > + ranges =3D <0x0 0xffe00000 0x10000>, <0x20000 0xffe20000 > 0x10000>; > > + power-domains =3D <&zynqmp_firmware PD_RPU_0>, > > + <&zynqmp_firmware PD_R5_0_ATCM>, > > + <&zynqmp_firmware PD_R5_0_BTCM>; > > + memory-region =3D <&rproc_0_fw_image>, <&rpu0vdev0buffer>, > <&rpu0vdev0vring0>, <&rpu0vdev0vring1>; > > + mboxes =3D <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>; > > + mbox-names =3D "tx", "rx"; > > + }; > > + > > + r5f_1: r5f@ffe90000 { > > + compatible =3D "xlnx,zynqmp-r5f"; > > + #address-cells =3D <1>; > > + #size-cells =3D <1>; > > + reg =3D <0xffe90000 0x10000>, <0xffeb0000 0x10000>; > > + reg-names =3D "atcm", "btcm"; > > + ranges =3D <0x0 0xffe90000 0x10000>, <0x20000 0xffeb0000 > 0x10000>; > > + power-domains =3D <&zynqmp_firmware PD_RPU_1>, > > + <&zynqmp_firmware PD_R5_1_ATCM>, > > + <&zynqmp_firmware PD_R5_1_BTCM>; > > + memory-region =3D <&rproc_1_fw_image>, <&rpu1vdev0buffer>, > <&rpu1vdev0vring0>, <&rpu1vdev0vring1>; > > + mboxes =3D <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>; > > + mbox-names =3D "tx", "rx"; > > + }; > > + }; > > + > > + - | > > + //Lockstep configuration > > remoteproc { > > compatible =3D "xlnx,zynqmp-r5fss"; > > xlnx,cluster-mode =3D <1>; > > > > - r5f-0 { > > + #address-cells =3D <1>; > > + #size-cells =3D <1>; > > + r5f_00: r5f@ffe00000 { > > compatible =3D "xlnx,zynqmp-r5f"; > > - power-domains =3D <&zynqmp_firmware 0x7>; > > + #address-cells =3D <1>; > > + #size-cells =3D <1>; > > + reg =3D <0xffe00000 0x20000>, <0xffe20000 0x20000>; > > + reg-names =3D "atcm", "btcm"; > > + ranges =3D <0x0 0xffe00000 0x20000>, <0x20000 0xffe20000 > 0x20000>; > > + power-domains =3D <&zynqmp_firmware PD_RPU_0>, > > + <&zynqmp_firmware PD_R5_0_ATCM>, > > + <&zynqmp_firmware PD_R5_0_BTCM>; > > memory-region =3D <&rproc_0_fw_image>, <&rpu0vdev0buffer>, > <&rpu0vdev0vring0>, <&rpu0vdev0vring1>; > > mboxes =3D <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>; > > mbox-names =3D "tx", "rx"; > > @@ -126,7 +202,7 @@ examples: > > > > r5f-1 { > > compatible =3D "xlnx,zynqmp-r5f"; > > - power-domains =3D <&zynqmp_firmware 0x8>; > > + power-domains =3D <&zynqmp_firmware PD_RPU_1>; > > memory-region =3D <&rproc_1_fw_image>, <&rpu1vdev0buffer>, > <&rpu1vdev0vring0>, <&rpu1vdev0vring1>; > > mboxes =3D <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>; > > mbox-names =3D "tx", "rx"; > > -- > > 2.25.1 > >