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Thu, 22 Jun 2023 15:57:22 -0500 From: Terry Bowman To: , , , , , , , CC: , , , Subject: [PATCH v7 10/27] cxl/port: Remove Component Register base address from struct cxl_dport Date: Thu, 22 Jun 2023 15:55:06 -0500 Message-ID: <20230622205523.85375-11-terry.bowman@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230622205523.85375-1-terry.bowman@amd.com> References: <20230622205523.85375-1-terry.bowman@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E5:EE_|DM4PR12MB5722:EE_ X-MS-Office365-Filtering-Correlation-Id: c08532ab-bddf-4385-f5a7-08db73634716 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: sFMjaGlC5qKkOJD+Dt6vlnIQ55DJjIYE7X/8cA9PtPsBD2A2JJAvAuZ9G/VKhFrTA1mUSEbyzANESuyrhhb5qrBNEE4ArPJrsQUIY7GFU4S3fXucukJZ4iywHtnQPVm1+8Ojp0c5LOxgNevMpVg8o1+m+G1/KYJkHUqDX5toB1odse364u3hMfZRkgL81t3weXk7/4meiv5P7yQZJHhBSGx1RTa1pRkcFznzwYD/fWs9gGxH/pnJ4jsKaFRfHwngp9ubltx2VbTmqR+9oe/WZZGMqvofRJ0tBPUdqm4vQTdZrVx8enpcCaxnISmnLf0hLro6wswwstWXR+pM0JQEiuxsuvxstVDn8IZefcAvUCJ7/ay/JLAhGM7L9LWgI+Z5wUKaERx0e8tMB0b5N63h/kFrsXRxf4xzZhkYsTWVgnG39EB4tw6qj/cOyqGicVQQYdHtrxMeatDUT6KFhD0oeSuvUIlh5pozoyC0rvVYARWcY9NkeeusahMbdhyXh7HqmrReQ0Z58jDMIpn2qCQh2tK1fp2ny4yr3AF9BSuaSAQKu2NaTrbZDpxJQeJOgmlptVJ+XpU+9eoR9TfPA8DKmNIVM94/ZCsHLo2TTjJTdRpYZ1BbNaj0DYg1JrLO8eIzl3gRJe2vHXVy4y1visyLL/gj0sUNvd+rq8fGvEL5dW3rzCQHGXpWU0lVXMdiR6vXYD2jQIBZofylIkeYy0BdSnELvJMJUoDIFFppyR1vtTwOOcxw8xmylM1sNPRd5TF37KNEi3sFbYYJf/AE9168LA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(39860400002)(376002)(396003)(346002)(136003)(451199021)(40470700004)(46966006)(36840700001)(356005)(36860700001)(81166007)(4326008)(6666004)(82740400003)(26005)(186003)(16526019)(54906003)(110136005)(36756003)(2906002)(40480700001)(40460700003)(86362001)(82310400005)(2616005)(316002)(44832011)(336012)(8936002)(70586007)(70206006)(7696005)(1076003)(5660300002)(478600001)(426003)(7416002)(83380400001)(41300700001)(8676002)(47076005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Jun 2023 20:57:23.2981 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c08532ab-bddf-4385-f5a7-08db73634716 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E5.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5722 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Robert Richter The Component Register base address @component_reg_phys is no longer used after the rework of the Component Register setup which now uses struct member @comp_map instead. Remove the base address. Signed-off-by: Robert Richter Signed-off-by: Terry Bowman Reviewed-by: Jonathan Cameron --- drivers/cxl/core/port.c | 1 - drivers/cxl/cxl.h | 2 -- 2 files changed, 3 deletions(-) diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index cdfe0ea7a2e9..e0d2e7596440 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -960,7 +960,6 @@ __devm_cxl_add_dport(struct cxl_port *port, struct device *dport_dev, dport->dport_dev = dport_dev; dport->port_id = port_id; - dport->component_reg_phys = component_reg_phys; dport->port = port; cond_cxl_root_lock(port); diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index ae265357170e..7fbc52b81554 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -594,7 +594,6 @@ struct cxl_rcrb_info { * struct cxl_dport - CXL downstream port * @dport_dev: PCI bridge or firmware device representing the downstream link * @port_id: unique hardware identifier for dport in decoder target list - * @component_reg_phys: downstream port component registers * @rcrb: Data about the Root Complex Register Block layout * @rch: Indicate whether this dport was enumerated in RCH or VH mode * @port: reference to cxl_port that contains this downstream port @@ -602,7 +601,6 @@ struct cxl_rcrb_info { struct cxl_dport { struct device *dport_dev; int port_id; - resource_size_t component_reg_phys; struct cxl_rcrb_info rcrb; bool rch; struct cxl_port *port; -- 2.34.1