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Thu, 22 Jun 2023 15:57:44 -0500 From: Terry Bowman To: , , , , , , , CC: , , , Subject: [PATCH v7 12/27] cxl/mem: Prepare for early RCH dport component register setup Date: Thu, 22 Jun 2023 15:55:08 -0500 Message-ID: <20230622205523.85375-13-terry.bowman@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230622205523.85375-1-terry.bowman@amd.com> References: <20230622205523.85375-1-terry.bowman@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE32:EE_|SN7PR12MB7786:EE_ X-MS-Office365-Filtering-Correlation-Id: 4829c2e1-4b87-46c3-83c3-08db73635419 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: wKegTKZaoEHF1DjIR/kADpfavsG8hLgecaiaHOooGSDPbhYGHBxOdRvhtiv0ilR6JWO2yLzB2wOA9lMQmNGgT4ItjHdlAqX0lRoxi+WlOFldrTNoTVC8ZQX9jK/Mm5gpGaBG5CZJie9kMwg3MAu1P4/GPliXZLLGi1Kh7YcwsXcUR72+M46dvl7rYYs0pc6ZfCeORCp6vhh16OpBj2JablC8PaAqa8Ya1R6rJhgTLumMr0DIwVtOIcWARto131Voehi5MXQRTHgvsdMIvB11XoUpo7yl01mMcAcH1i8Fl/XdCBaUieQvJWmFPHu9A/EbxbzhhAJXCslME8Jd/1feNWmy+6qHF72TLT44HKfTWXr7LO8o24LYJigeXU+lJ/0/4clfrcYaxvmFQ3qY+1MwD4yQwEVdeTNEpkcqXJQDBXrj3XcOoLDAQIUPoZf4yhQ9XaT+hH+ja57I0UApDM5optCMb7i848XkWKcMErj8T0GGnDB7TNOolmkvv7EFDUabn5Y4hnlzLiR3XfhhwI6uwKvD5vGf3/0prkaP88lUo385i+5wMjJVbpHTo16pRoBBwwiUSIgw5dOVdU6dwaJHVoUbmaROGPpVyitifICi6WEsR0tmPvUe9joB/j3OkZZjcB/bXQV4is6uJklVFFKDPD2VTz8/RxTzrcDoY/je8FdysoQZ6C5ql1BTv7jHiZLwsfJsx2nGlgnpDvMzCnkSN2DzMAC4wjLAPoTYaXKwl2klR9Yar5la8iMcOycD+cK1GQdwB6fFqA5YPOA21VHmWQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(136003)(39860400002)(376002)(346002)(396003)(451199021)(40470700004)(46966006)(36840700001)(41300700001)(8676002)(70206006)(4326008)(70586007)(316002)(1076003)(186003)(8936002)(16526019)(26005)(2616005)(40460700003)(54906003)(110136005)(6666004)(7696005)(478600001)(82310400005)(2906002)(7416002)(44832011)(5660300002)(40480700001)(81166007)(356005)(82740400003)(36756003)(86362001)(83380400001)(336012)(426003)(47076005)(36860700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Jun 2023 20:57:45.2034 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4829c2e1-4b87-46c3-83c3-08db73635419 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE32.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7786 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Robert Richter In order to move the RCH dport component register setup to cxl_pci the base address must be stored in CXL device state (cxlds) for both modes, RCH and VH. Store it in cxlds->component_reg_phys and use it for endpoint creation. Signed-off-by: Robert Richter Signed-off-by: Terry Bowman Reviewed-by: Jonathan Cameron --- drivers/cxl/mem.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c index 4cc461c22b8b..7638a7f8f333 100644 --- a/drivers/cxl/mem.c +++ b/drivers/cxl/mem.c @@ -51,7 +51,6 @@ static int devm_cxl_add_endpoint(struct device *host, struct cxl_memdev *cxlmd, struct cxl_port *parent_port = parent_dport->port; struct cxl_dev_state *cxlds = cxlmd->cxlds; struct cxl_port *endpoint, *iter, *down; - resource_size_t component_reg_phys; int rc; /* @@ -72,11 +71,11 @@ static int devm_cxl_add_endpoint(struct device *host, struct cxl_memdev *cxlmd, * typical register locator mechanism. */ if (parent_dport->rch && cxlds->component_reg_phys == CXL_RESOURCE_NONE) - component_reg_phys = + cxlds->component_reg_phys = cxl_rcd_component_reg_phys(&cxlmd->dev, parent_dport); - else - component_reg_phys = cxlds->component_reg_phys; - endpoint = devm_cxl_add_port(host, &cxlmd->dev, component_reg_phys, + + endpoint = devm_cxl_add_port(host, &cxlmd->dev, + cxlds->component_reg_phys, parent_dport); if (IS_ERR(endpoint)) return PTR_ERR(endpoint); -- 2.34.1