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Thu, 22 Jun 2023 23:17:59 +0000 Message-ID: Date: Thu, 22 Jun 2023 16:17:55 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Betterbird/102.11.1 Subject: Re: [PATCH v6 09/27] cxl/acpi: Move add_host_bridge_uport() after cxl_get_chbs() To: Terry Bowman , , , , , , , CC: , , References: <20230622035126.4130151-1-terry.bowman@amd.com> <20230622035126.4130151-10-terry.bowman@amd.com> Content-Language: en-US From: Dave Jiang In-Reply-To: <20230622035126.4130151-10-terry.bowman@amd.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: SJ0PR03CA0248.namprd03.prod.outlook.com (2603:10b6:a03:3a0::13) To PH7PR11MB5984.namprd11.prod.outlook.com (2603:10b6:510:1e3::15) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH7PR11MB5984:EE_|PH7PR11MB8057:EE_ X-MS-Office365-Filtering-Correlation-Id: c93f3d65-0098-4509-51d6-08db7376eb13 X-LD-Processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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No other changes at all. > > Signed-off-by: Robert Richter > Signed-off-by: Terry Bowman > Reviewed-by: Jonathan Cameron Reviewed-by: Dave Jiang > --- > drivers/cxl/acpi.c | 90 +++++++++++++++++++++++----------------------- > 1 file changed, 45 insertions(+), 45 deletions(-) > > diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c > index 70cd9ac73a8b..0c975ee684b0 100644 > --- a/drivers/cxl/acpi.c > +++ b/drivers/cxl/acpi.c > @@ -327,51 +327,6 @@ __mock struct acpi_device *to_cxl_host_bridge(struct device *host, > return NULL; > } > > -/* > - * A host bridge is a dport to a CFMWS decode and it is a uport to the > - * dport (PCIe Root Ports) in the host bridge. > - */ > -static int add_host_bridge_uport(struct device *match, void *arg) > -{ > - struct cxl_port *root_port = arg; > - struct device *host = root_port->dev.parent; > - struct acpi_device *hb = to_cxl_host_bridge(host, match); > - struct acpi_pci_root *pci_root; > - struct cxl_dport *dport; > - struct cxl_port *port; > - struct device *bridge; > - int rc; > - > - if (!hb) > - return 0; > - > - pci_root = acpi_pci_find_root(hb->handle); > - bridge = pci_root->bus->bridge; > - dport = cxl_find_dport_by_dev(root_port, bridge); > - if (!dport) { > - dev_dbg(host, "host bridge expected and not found\n"); > - return 0; > - } > - > - if (dport->rch) { > - dev_info(bridge, "host supports CXL (restricted)\n"); > - return 0; > - } > - > - rc = devm_cxl_register_pci_bus(host, bridge, pci_root->bus); > - if (rc) > - return rc; > - > - port = devm_cxl_add_port(host, bridge, dport->component_reg_phys, > - dport); > - if (IS_ERR(port)) > - return PTR_ERR(port); > - > - dev_info(bridge, "host supports CXL\n"); > - > - return 0; > -} > - > /* Note, @dev is used by mock_acpi_table_parse_cedt() */ > struct cxl_chbs_context { > struct device *dev; > @@ -467,6 +422,51 @@ static int add_host_bridge_dport(struct device *match, void *arg) > return 0; > } > > +/* > + * A host bridge is a dport to a CFMWS decode and it is a uport to the > + * dport (PCIe Root Ports) in the host bridge. > + */ > +static int add_host_bridge_uport(struct device *match, void *arg) > +{ > + struct cxl_port *root_port = arg; > + struct device *host = root_port->dev.parent; > + struct acpi_device *hb = to_cxl_host_bridge(host, match); > + struct acpi_pci_root *pci_root; > + struct cxl_dport *dport; > + struct cxl_port *port; > + struct device *bridge; > + int rc; > + > + if (!hb) > + return 0; > + > + pci_root = acpi_pci_find_root(hb->handle); > + bridge = pci_root->bus->bridge; > + dport = cxl_find_dport_by_dev(root_port, bridge); > + if (!dport) { > + dev_dbg(host, "host bridge expected and not found\n"); > + return 0; > + } > + > + if (dport->rch) { > + dev_info(bridge, "host supports CXL (restricted)\n"); > + return 0; > + } > + > + rc = devm_cxl_register_pci_bus(host, bridge, pci_root->bus); > + if (rc) > + return rc; > + > + port = devm_cxl_add_port(host, bridge, dport->component_reg_phys, > + dport); > + if (IS_ERR(port)) > + return PTR_ERR(port); > + > + dev_info(bridge, "host supports CXL\n"); > + > + return 0; > +} > + > static int add_root_nvdimm_bridge(struct device *match, void *data) > { > struct cxl_decoder *cxld;