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From:   Huacai Chen <chenhuacai@kernel.org>
Date:   Sat, 24 Jun 2023 00:00:20 +0800
Message-ID: <CAAhV-H4MS3_ty+jGcor-bW7OaesJp_2avnE71ima99vAzatuPA@mail.gmail.com>
Subject: Re: [PATCH 3/9] LoongArch: Prepare for assemblers with proper FCSR
 bank support
To:     WANG Xuerui <kernel@xen0n.name>
Cc:     WANG Rui <wangrui@loongson.cn>, Xi Ruoyao <xry111@xry111.site>,
        loongarch@lists.linux.dev, linux-kbuild@vger.kernel.org,
        llvm@lists.linux.dev, linux-kernel@vger.kernel.org,
        WANG Xuerui <git@xen0n.name>
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Hi, Xuerui,

On Fri, Jun 23, 2023 at 9:44=E2=80=AFPM WANG Xuerui <kernel@xen0n.name> wro=
te:
>
> From: WANG Xuerui <git@xen0n.name>
>
> The GNU assembler (as of 2.40) mis-treats FCSR operands as GPRs, but
> the LLVM IAS does not. Probe for this and refer to FCSRs as "$fcsrNN"
> if support is present.
>
> Signed-off-by: WANG Xuerui <git@xen0n.name>
> ---
>  arch/loongarch/Kconfig                | 3 +++
>  arch/loongarch/include/asm/fpregdef.h | 7 +++++++
>  2 files changed, 10 insertions(+)
>
> diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
> index 743d87655742..c8e4f8b03c55 100644
> --- a/arch/loongarch/Kconfig
> +++ b/arch/loongarch/Kconfig
> @@ -242,6 +242,9 @@ config SCHED_OMIT_FRAME_POINTER
>  config AS_HAS_EXPLICIT_RELOCS
>         def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x))
>
> +config AS_HAS_FCSR_BANK
> +       def_bool $(as-instr,x:movfcsr2gr \$t0$(comma)\$fcsr0)
The word "bank" is difficult to understand, at least for me, so use
"class" may be better.

Huacai
> +
>  config CC_HAS_LSX_EXTENSION
>         def_bool $(cc-option,-mlsx)
>
> diff --git a/arch/loongarch/include/asm/fpregdef.h b/arch/loongarch/inclu=
de/asm/fpregdef.h
> index b6be527831dd..b0ac640db74c 100644
> --- a/arch/loongarch/include/asm/fpregdef.h
> +++ b/arch/loongarch/include/asm/fpregdef.h
> @@ -40,6 +40,12 @@
>  #define fs6    $f30
>  #define fs7    $f31
>
> +#ifdef CONFIG_AS_HAS_FCSR_BANK
> +#define fcsr0  $fcsr0
> +#define fcsr1  $fcsr1
> +#define fcsr2  $fcsr2
> +#define fcsr3  $fcsr3
> +#else
>  /*
>   * Current binutils expects *GPRs* at FCSR position for the FCSR
>   * operation instructions, so define aliases for those used.
> @@ -48,5 +54,6 @@
>  #define fcsr1  $r1
>  #define fcsr2  $r2
>  #define fcsr3  $r3
> +#endif
>
>  #endif /* _ASM_FPREGDEF_H */
> --
> 2.40.0
>