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[83.9.30.30]) by smtp.gmail.com with ESMTPSA id c26-20020ac2531a000000b004f13ca69dc8sm98316lfh.72.2023.06.23.18.42.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 23 Jun 2023 18:42:48 -0700 (PDT) Message-ID: <035ffdd2-27e3-99bc-f8a4-41e66685db09@linaro.org> Date: Sat, 24 Jun 2023 03:42:46 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH 00/15] drm/msm: Add SM6125 MDSS/DPU hardware and enable Sony Xperia 10 II panel Content-Language: en-US To: Marijn Suijten , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Krishna Manikandan Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Martin Botka , Jami Kettunen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Lux Aliaga References: <20230624-sm6125-dpu-v1-0-1d5a638cebf2@somainline.org> From: Konrad Dybcio In-Reply-To: <20230624-sm6125-dpu-v1-0-1d5a638cebf2@somainline.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 24.06.2023 02:40, Marijn Suijten wrote: > Bring up the SM6125 DPU now that all preliminary series (such as INTF > TE) have been merged (for me to test the hardware properly) We should not repeat the same mistake in the future.. Finding a balance between releasing early and releasing what we can declare working and tested code is hard, but we waaaaaaaay overstayed on this one.. Konrad , and most > other conflicting work (barring ongoing catalog *improvements*) has made > its way in as well or is still being discussed. > > The second part of the series complements that by immediately utilizing > this hardware in DT, and even enabling the MDSS/DSI nodes complete with > a 6.0" 1080x2520 panel for Sony's Seine PDX201 (Xperia 10 II). > > The last patch ("sm6125-seine: Configure MDSS, DSI and panel") depends > on (an impending v2 of) my Sony panel collection series [1]. > > [1]: https://lore.kernel.org/linux-arm-msm/20230521-drm-panels-sony-v1-0-541c341d6bee@somainline.org/ > > --- > Marijn Suijten (15): > arm64: dts: qcom: sm6125: Sort spmi_bus node numerically by reg > dt-bindings: clock: qcom,dispcc-sm6125: Remove unused GCC_DISP_AHB_CLK > dt-bindings: clock: qcom,dispcc-sm6125: Require GCC PLL0 DIV clock > dt-bindings: clock: qcom,dispcc-sm6125: Allow power-domains property > dt-bindings: display/msm: dsi-controller-main: Document SM6125 > dt-bindings: display/msm: sc7180-dpu: Describe SM6125 > dt-bindings: display/msm: Add SM6125 MDSS > drm/msm/dpu: Add SM6125 support > drm/msm/mdss: Add SM6125 support > dt-bindings: msm: dsi-phy-14nm: Document SM6125 variant > drm/msm/dsi: Add 14nm phy configuration for SM6125 > arm64: dts: qcom: sm6125: Switch fixed xo_board clock to RPM XO clock > arm64: dts: qcom: sm6125: Add dispcc node > arm64: dts: qcom: sm6125: Add display hardware nodes > arm64: dts: qcom: sm6125-seine: Configure MDSS, DSI and panel > > .../bindings/clock/qcom,dispcc-sm6125.yaml | 17 +- > .../bindings/display/msm/dsi-controller-main.yaml | 2 + > .../bindings/display/msm/dsi-phy-14nm.yaml | 1 + > .../bindings/display/msm/qcom,sc7180-dpu.yaml | 1 + > .../bindings/display/msm/qcom,sm6125-mdss.yaml | 206 +++++++++++++++++ > .../dts/qcom/sm6125-sony-xperia-seine-pdx201.dts | 59 +++++ > arch/arm64/boot/dts/qcom/sm6125.dtsi | 244 +++++++++++++++++++-- > .../gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h | 173 +++++++++++++++ > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 + > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 + > drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 + > drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 + > drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 + > drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 15 ++ > drivers/gpu/drm/msm/msm_mdss.c | 8 + > 15 files changed, 712 insertions(+), 25 deletions(-) > --- > base-commit: 8d2be868b42c08290509c60515865f4de24ea704 > change-id: 20230624-sm6125-dpu-aedc9637ee7b > > Best regards,