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Subject: Re: [PATCH v3 1/1] perf: RISC-V: Limit the number of counters
 returned from SBI
Message-Id: <168773507352.1389.2672044920046049803.b4-ty@rivosinc.com>
Date:   Sun, 25 Jun 2023 16:17:53 -0700
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Cc:     linux@yadro.com, Andrew Jones <ajones@ventanamicro.com>,
        Atish Patra <atishp@rivosinc.com>,
        Atish Patra <atishp@atishpatra.org>,
        Anup Patel <anup@brainfault.org>,
        Will Deacon <will@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        linux-riscv@lists.infradead.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
From:   Palmer Dabbelt <palmer@rivosinc.com>
To:     Viacheslav Mitrofanov <v.v.mitrofanov@yadro.com>
Precedence: bulk


On Fri, 05 May 2023 07:20:57 +0000, Viacheslav Mitrofanov wrote:
> Perf gets the number of supported counters from SBI. If it happens that
> the number of returned counters more than RISCV_MAX_COUNTERS the code
> trusts it. It does not lead to an immediate problem but can potentially
> lead to it. Prevent getting more than RISCV_MAX_COUNTERS from SBI.
> 
> 

Applied, thanks!

[1/1] perf: RISC-V: Limit the number of counters returned from SBI
      https://git.kernel.org/palmer/c/ee95b88d71b9

Best regards,
-- 
Palmer Dabbelt <palmer@rivosinc.com>