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[144.178.202.138]) by smtp.gmail.com with ESMTPSA id lc6-20020a170906f90600b0096637a19dccsm2956929ejb.210.2023.06.26.01.28.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 26 Jun 2023 01:28:21 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Mon, 26 Jun 2023 10:28:21 +0200 Message-Id: Cc: , , , , , , Subject: Re: [PATCH 0/7] Add support for LUT PPG From: "Luca Weiss" To: "Anjelique Melendez" , , , , , , , , X-Mailer: aerc 0.15.1 References: <20230621185949.2068-1-quic_amelende@quicinc.com> In-Reply-To: <20230621185949.2068-1-quic_amelende@quicinc.com> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Anjelique, On Wed Jun 21, 2023 at 8:59 PM CEST, Anjelique Melendez wrote: > In certain PMICs, LUT pattern and LPG configuration can be stored in SDAM > modules instead of LUT peripheral. This feature is called PPG. > > This change series adds support for PPG. Thanks! Thanks for sending this series! I've tested this on SDM632 Fairphone 3 and everything appears to work fine with setting the pattern. Using fbcli from feedbackd[0] the pattern shows up correctly. The only thing missing really is the addition of the pbs node and adding the nvmem/nvmem-names & qcom,pbs-client to the lpg node in pmi632.dtsi - something like the patch below. Are you planning to include this in the next revision? Otherwise I can also send a patch for the pmi632.dtsi after this series has landed. Tested-by: Luca Weiss # sdm632-fairphone-fp3 (pm= i632) [0] https://source.puri.sm/Librem5/feedbackd Regards Luca diff --git a/arch/arm64/boot/dts/qcom/pmi632.dtsi b/arch/arm64/boot/dts/qco= m/pmi632.dtsi index add206dee01d2e..92ddb7ac6bf311 100644 --- a/arch/arm64/boot/dts/qcom/pmi632.dtsi +++ b/arch/arm64/boot/dts/qcom/pmi632.dtsi @@ -127,6 +127,11 @@ status =3D "disabled"; }; =20 + pmi632_pbs_client3: qcom,pbs@7400 { // TODO: generic node name + compatible =3D "qcom,pbs"; + reg =3D <0x7400>; + }; + pmi632_sdam_7: nvram@b600 { compatible =3D "qcom,spmi-sdam"; reg =3D <0xb600>; @@ -155,6 +160,10 @@ pmi632_lpg: pwm { compatible =3D "qcom,pmi632-lpg"; =20 + nvmem =3D <&pmi632_sdam_7>; + nvmem-names =3D "lpg_chan_sdam"; + qcom,pbs-client =3D <&pmi632_pbs_client3>; + #address-cells =3D <1>; #size-cells =3D <0>; #pwm-cells =3D <2>; > > Anjelique Melendez (7): > dt-bindings: soc: qcom: Add qcom-pbs bindings > dt-bindings: leds: leds-qcom-lpg: Add support for LUT through NVMEM > devices > soc: qcom: add QCOM PBS driver > leds: rgb: leds-qcom-lpg: Add support for LUT pattern through single > SDAM > leds: rgb: leds-qcom-lpg: Update PMI632 lpg_data to support PPG > leds: rgb: leds-qcom-lpg: Support two-nvmem PPG Scheme > leds: rgb: Update PM8350C lpg_data to support two-nvmem PPG Scheme > > .../bindings/leds/leds-qcom-lpg.yaml | 85 ++++ > .../bindings/soc/qcom/qcom-pbs.yaml | 41 ++ > drivers/leds/rgb/leds-qcom-lpg.c | 393 ++++++++++++++++-- > drivers/soc/qcom/Kconfig | 9 + > drivers/soc/qcom/Makefile | 1 + > drivers/soc/qcom/qcom-pbs.c | 343 +++++++++++++++ > include/linux/soc/qcom/qcom-pbs.h | 36 ++ > 7 files changed, 877 insertions(+), 31 deletions(-) > create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom-pbs.y= aml > create mode 100644 drivers/soc/qcom/qcom-pbs.c > create mode 100644 include/linux/soc/qcom/qcom-pbs.h