Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
MIME-Version: 1.0
References: <20230623222016.3742145-1-evan@rivosinc.com> <tencent_817CE182DEDA938E03B848314821098D4408@qq.com>
 <253bad9e83cd4890b29dd89a3d5a1937@AcuMS.aculab.com>
In-Reply-To: <253bad9e83cd4890b29dd89a3d5a1937@AcuMS.aculab.com>
From:   Evan Green <evan@rivosinc.com>
Date:   Mon, 26 Jun 2023 12:49:10 -0700
Message-ID: <CALs-Hsu681qusmGn+aWarnTXQ=e20C52jSZU-q-hWihP+7ud7Q@mail.gmail.com>
Subject: Re: [PATCH 0/2] RISC-V: Probe for misaligned access speed
To:     David Laight <David.Laight@aculab.com>
Cc:     Yangyu Chen <cyy@cyyself.name>,
        "ajones@ventanamicro.com" <ajones@ventanamicro.com>,
        "alexghiti@rivosinc.com" <alexghiti@rivosinc.com>,
        "andy.chiu@sifive.com" <andy.chiu@sifive.com>,
        "aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
        "apatel@ventanamicro.com" <apatel@ventanamicro.com>,
        "conor.dooley@microchip.com" <conor.dooley@microchip.com>,
        "corbet@lwn.net" <corbet@lwn.net>,
        "greentime.hu@sifive.com" <greentime.hu@sifive.com>,
        "guoren@kernel.org" <guoren@kernel.org>,
        "heiko.stuebner@vrull.eu" <heiko.stuebner@vrull.eu>,
        "heiko@sntech.de" <heiko@sntech.de>,
        "jeeheng.sia@starfivetech.com" <jeeheng.sia@starfivetech.com>,
        "jszhang@kernel.org" <jszhang@kernel.org>,
        "leyfoon.tan@starfivetech.com" <leyfoon.tan@starfivetech.com>,
        "linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-riscv@lists.infradead.org" <linux-riscv@lists.infradead.org>,
        "lizhengyu3@huawei.com" <lizhengyu3@huawei.com>,
        "masahiroy@kernel.org" <masahiroy@kernel.org>,
        "palmer@dabbelt.com" <palmer@dabbelt.com>,
        "palmer@rivosinc.com" <palmer@rivosinc.com>,
        "paul.walmsley@sifive.com" <paul.walmsley@sifive.com>,
        "rdunlap@infradead.org" <rdunlap@infradead.org>,
        "samuel@sholland.org" <samuel@sholland.org>,
        "shosie@rivosinc.com" <shosie@rivosinc.com>,
        "sunilvl@ventanamicro.com" <sunilvl@ventanamicro.com>,
        "xianting.tian@linux.alibaba.com" <xianting.tian@linux.alibaba.com>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
Precedence: bulk

On Mon, Jun 26, 2023 at 2:24=E2=80=AFAM David Laight <David.Laight@aculab.c=
om> wrote:
>
> From: Yangyu Chen
> > Sent: 24 June 2023 11:22
> >
> > Hi,
> >
> > Thanks for doing this.
> >
> > On 6/24/23 6:20 AM, Evan Green wrote:
> > > I don't have a machine where misaligned accesses are slow, but I'd be
> > > interested to see the results of booting this series if someone did.
> >
> > I have tested your patches on a 100MHz BigCore rocket-chip with opensbi=
 running on FPGA with
> > 72bit(64bit+ECC) DDR3 1600MHz memory. As the rocket-chip did not suppor=
t misaligned memory access,
> > every misaligned memory access will trap and emulated by SBI.
> >
> > Here is the result:
> ...
> > ~ # dmesg | grep Unaligned
> > [    0.210140] cpu1: Unaligned word copy 0 MB/s, byte copy 38 MB/s, mis=
aligned accesses are slow
> > [    0.410715] cpu0: Unaligned word copy 0 MB/s, byte copy 35 MB/s, mis=
aligned accesses are slow
>
> How many misaligned cycles are in the test loop?
> If emulated ones are that slow you pretty much only need to test one.

The code does as many cycles as it can in a fixed number of jiffies.

>
> Also it is pretty clear that you really don't want to be emulating them.
> If the emulation is hidden from the kernel that really doesn't help at al=
l.

From what I understand there's work being done to give the kernel some
awareness and even control over the misaligned access
trapping/emulation. It won't help today's systems though, and either
way you're right emulating is very very slow.
-Evan