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[94.181.180.60]) by smtp.gmail.com with ESMTPSA id i12-20020a056512006c00b004eb12329053sm1420673lfo.256.2023.06.27.01.24.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Jun 2023 01:24:24 -0700 (PDT) From: Aleksandr Shubin To: linux-kernel@vger.kernel.org Cc: Aleksandr Shubin , Thierry Reding , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Philipp Zabel , Cristian Ciocaltea , Andre Przywara , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-riscv@lists.infradead.org Subject: [PATCH v3 3/3] riscv: dts: allwinner: d1: Add pwm node Date: Tue, 27 Jun 2023 11:23:26 +0300 Message-Id: <20230627082334.1253020-4-privatesub2@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230627082334.1253020-1-privatesub2@gmail.com> References: <20230627082334.1253020-1-privatesub2@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org D1 and T113s contain a pwm controller with 8 channels. This controller is supported by the sun20i-pwm driver. Add a device tree node for it. Signed-off-by: Aleksandr Shubin --- arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index 922e8e0e2c09..e24543b6aff7 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -127,6 +127,17 @@ uart3_pb_pins: uart3-pb-pins { }; }; + pwm: pwm@2000c00 { + compatible = "allwinner,sun20i-d1-pwm"; + reg = <0x02000c00 0x400>; + clocks = <&dcxo>, + <&ccu CLK_BUS_PWM>; + clock-names = "hosc", "bus"; + resets = <&ccu RST_BUS_PWM>; + status = "disabled"; + #pwm-cells = <0x3>; + }; + ccu: clock-controller@2001000 { compatible = "allwinner,sun20i-d1-ccu"; reg = <0x2001000 0x1000>; -- 2.25.1