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Date:   Tue, 27 Jun 2023 17:11:41 +0200
From:   Johan Hovold <johan@kernel.org>
To:     Konrad Dybcio <konrad.dybcio@linaro.org>
Cc:     Krishna Kurapati <quic_kriskura@quicinc.com>,
        Thinh Nguyen <Thinh.Nguyen@synopsys.com>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Andy Gross <agross@kernel.org>,
        Bjorn Andersson <andersson@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Felipe Balbi <balbi@kernel.org>,
        Wesley Cheng <quic_wcheng@quicinc.com>,
        linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
        quic_pkondeti@quicinc.com, quic_ppratap@quicinc.com,
        quic_jackp@quicinc.com, quic_harshq@quicinc.com,
        ahalaney@redhat.com, quic_shazhuss@quicinc.com
Subject: Re: [PATCH v9 08/10] arm64: dts: qcom: sc8280xp: Add multiport
 controller node for SC8280
Message-ID: <ZJr8LUKxsfpzRCol@hovoldconsulting.com>
References: <20230621043628.21485-1-quic_kriskura@quicinc.com>
 <20230621043628.21485-9-quic_kriskura@quicinc.com>
 <2eab503f-fa0d-990e-bed2-2445c5496798@linaro.org>
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In-Reply-To: <2eab503f-fa0d-990e-bed2-2445c5496798@linaro.org>
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On Sat, Jun 24, 2023 at 12:39:36AM +0200, Konrad Dybcio wrote:
> On 21.06.2023 06:36, Krishna Kurapati wrote:
> > Add USB and DWC3 node for tertiary port of SC8280 along with multiport
> > IRQ's and phy's. This will be used as a base for SA8295P and SA8295-Ride
> > platforms.
> > 
> > Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
> > ---
> >  arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 77 ++++++++++++++++++++++++++
> >  1 file changed, 77 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > index 8fa9fbfe5d00..0dfa350ea3b3 100644
> > --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > @@ -3013,6 +3013,83 @@ system-cache-controller@9200000 {
> >  			interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
> >  		};
> >  
> > +		usb_2: usb@a4f8800 {
> > +			compatible = "qcom,sc8280xp-dwc3-mp", "qcom,dwc3";
> > +			reg = <0 0x0a4f8800 0 0x400>;
> 
> > +			#address-cells = <2>;
> > +			#size-cells = <2>;
> > +			ranges;
> These three properties, please stick just before status

No, please keep them were they are for consistency with the rest of the
file.
 
> > +
> > +			clocks = <&gcc GCC_CFG_NOC_USB3_MP_AXI_CLK>,
> > +				 <&gcc GCC_USB30_MP_MASTER_CLK>,
> > +				 <&gcc GCC_AGGRE_USB3_MP_AXI_CLK>,
> > +				 <&gcc GCC_USB30_MP_SLEEP_CLK>,
> > +				 <&gcc GCC_USB30_MP_MOCK_UTMI_CLK>,
> > +				 <&gcc GCC_AGGRE_USB_NOC_AXI_CLK>,
> > +				 <&gcc GCC_AGGRE_USB_NOC_NORTH_AXI_CLK>,
> > +				 <&gcc GCC_AGGRE_USB_NOC_SOUTH_AXI_CLK>,
> > +				 <&gcc GCC_SYS_NOC_USB_AXI_CLK>;
> > +			clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi",
> > +				      "noc_aggr", "noc_aggr_north", "noc_aggr_south", "noc_sys";
> Please make it one per line

Also not needed for the same reason.

> 
> > +
> > +			assigned-clocks = <&gcc GCC_USB30_MP_MOCK_UTMI_CLK>,
> > +					  <&gcc GCC_USB30_MP_MASTER_CLK>;
> > +			assigned-clock-rates = <19200000>, <200000000>;
> And here

Same here.

Johan