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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR11MB3260.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 25349cdf-c762-40a4-51ab-08db77295b86 X-MS-Exchange-CrossTenant-originalarrivaltime: 27 Jun 2023 16:12:51.5931 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: DK0cBx2BnFXU89R/sOHmSF3cyLz2LrJ9dHW/4JGqHLsNJexBWo12mgPy1eqx+7YU03DqQ3zNnfvW9CEB1pGmCQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR11MB6848 X-OriginatorOrg: intel.com X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Peter Zijlstra > Sent: Tuesday, June 27, 2023 6:15 PM > To: Lu, Aaron > Cc: Deng, Pan ; Chen, Tim C ; > vincent.guittot@linaro.org; linux-kernel@vger.kernel.org; Li, Tianyou > ; Ma, Yu ; Zhu, Lipeng > ; Chen, Yu C ; Tim Chen > > Subject: Re: [PATCH v2] sched/task_group: Re-layout structure to reduce f= alse > sharing >=20 > On Mon, Jun 26, 2023 at 01:47:56PM +0800, Aaron Lu wrote: >=20 > > > diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h index > > > ec7b3e0a2b20..4fbd4b3a4bdd 100644 > > > --- a/kernel/sched/sched.h > > > +++ b/kernel/sched/sched.h > > > @@ -389,6 +389,19 @@ struct task_group { #endif #endif > > > > > > + struct rcu_head rcu; > > > + struct list_head list; > > > + > > > + struct list_head siblings; > > > + struct list_head children; > > > + > > > + /* > > > + * To reduce false sharing, current layout is optimized to make > > > + * sure load_avg is in a different cacheline from parent, rt_se > > > + * and rt_rq. > > > + */ >=20 > That comment is misleading I think; you don't particularly care about tho= se > fields more than any other active fields that would cause false sharing. >=20 How about this one: /* * load_avg can also cause cacheline bouncing with parent, rt_se * and rt_rq, current layout is optimized to make sure they are in * different cachelines. */ > > > + struct task_group *parent; > > > + > > > > I wonder if we can simply do: > > > > diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h index > > ec7b3e0a2b20..31b73e8d9568 100644 > > --- a/kernel/sched/sched.h > > +++ b/kernel/sched/sched.h > > @@ -385,7 +385,9 @@ struct task_group { > > * it in its own cacheline separated from the fields above which > > * will also be accessed at each tick. > > */ > > - atomic_long_t load_avg ____cacheline_aligned; > > + struct { > > + atomic_long_t load_avg; > > + } ____cacheline_aligned_in_smp; > > #endif > > #endif > > > > This way it can make sure there is no false sharing with load_avg no > > matter how the layout of this structure changes in the future. >=20 > This. Also, ISTR there was a series to split this atomic across nodes; wh= atever > happend to that, and can we still measure an improvement over this with t= hat > approach? I just ran unixbench context-switching in 1 node with 40C/80T, without this= change perf c2c data shows c2c bouncing is still there, perf record data shows set= _task_cpu takes ~4.5% overall cycles. With this change, that false-sharing is resolve= d, and set_task_cpu cycles drop to 0.5%. Thanks Pan