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References: <20230521-drm-panels-sony-v1-0-541c341d6bee@somainline.org> <20230521-drm-panels-sony-v1-10-541c341d6bee@somainline.org>
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From:   Linus Walleij <linus.walleij@linaro.org>
Date:   Wed, 28 Jun 2023 11:22:37 +0200
Message-ID: <CACRpkdbrk_pPqewo-bGPq4NQScHSRKNMeO0ik_aqEQ+BY12BBQ@mail.gmail.com>
Subject: Re: [PATCH RFC 10/10] drm/panel/sony-griffin-samsung: Add panel
 driver for Sony Xperia 1
To:     Marijn Suijten <marijn.suijten@somainline.org>
Cc:     Neil Armstrong <neil.armstrong@linaro.org>,
        Sam Ravnborg <sam@ravnborg.org>,
        David Airlie <airlied@gmail.com>,
        Daniel Vetter <daniel@ffwll.ch>,
        Caleb Connolly <caleb@connolly.tech>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        Andy Gross <agross@kernel.org>,
        Bjorn Andersson <andersson@kernel.org>,
        devicetree@vger.kernel.org,
        Jami Kettunen <jami.kettunen@somainline.org>,
        linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
        dri-devel@lists.freedesktop.org,
        Abhinav Kumar <quic_abhinavk@quicinc.com>,
        Konrad Dybcio <konrad.dybcio@linaro.org>,
        Martin Botka <martin.botka@somainline.org>,
        ~postmarketos/upstreaming@lists.sr.ht,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@somainline.org>,
        Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
        Jessica Zhang <quic_jesszhan@quicinc.com>,
        Kuogee Hsieh <quic_khsieh@quicinc.com>
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On Sun, May 21, 2023 at 11:23=E2=80=AFPM Marijn Suijten
<marijn.suijten@somainline.org> wrote:

> The Sony Xperia 1 (codename kumano griffin) features an unnamed 4k OLED
> DSI cmd mode panel produced by Samsung.  It can be driven in a
> 1644x3840@60 or 1096x2560@60 mode, and always has Display Stream
> Compression 1.1 enabled.
>
> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
(...)

> +static int sony_griffin_samsung_on(struct sony_griffin_samsung *ctx)
> +{

> +       ret =3D mipi_dsi_dcs_exit_sleep_mode(dsi);
> +       if (ret < 0) {
> +               dev_err(dev, "Failed to exit sleep mode: %d\n", ret);
> +               return ret;
> +       }
> +       usleep_range(10000, 11000);
> +
> +       ret =3D mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLA=
NK);
> +       if (ret < 0) {
> +               dev_err(dev, "Failed to set tear on: %d\n", ret);
> +               return ret;
> +       }
> +
> +       mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);
> +       mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x05);
> +       mipi_dsi_dcs_write_seq(dsi, 0xd7, 0x07);
> +       mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
> +       /* Enable backlight control */
> +       mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, BIT(5=
));
> +       msleep(110);
> +       mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);
> +       mipi_dsi_dcs_write_seq(dsi, 0xe2, enable_4k ? 0 : 1);
> +       mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
> +
> +       ret =3D mipi_dsi_dcs_set_column_address(dsi, 0, hdisplay - 1);
> +       if (ret < 0) {
> +               dev_err(dev, "Failed to set column address: %d\n", ret);
> +               return ret;
> +       }
> +
> +       ret =3D mipi_dsi_dcs_set_page_address(dsi, 0, vdisplay - 1);
> +       if (ret < 0) {
> +               dev_err(dev, "Failed to set page address: %d\n", ret);
> +               return ret;
> +       }
> +
> +       mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);
> +       mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x70);
> +       mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0x60);
> +       mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
> +       mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);
> +       mipi_dsi_dcs_write_seq(dsi, 0xc5, 0x2e, 0x21);
> +       mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
> +
> +       ret =3D mipi_dsi_dcs_set_display_on(dsi);
> +       if (ret < 0) {
> +               dev_err(dev, "Failed to turn display on: %d\n", ret);
> +               return ret;
> +       }
> +
> +       return 0;
> +}

This is eerily similar to the sequence in panel-samsung-sofef00.c:

static int sofef00_panel_on(struct sofef00_panel *ctx)
{
        struct mipi_dsi_device *dsi =3D ctx->dsi;
        struct device *dev =3D &dsi->dev;
        int ret;

        dsi->mode_flags |=3D MIPI_DSI_MODE_LPM;

        ret =3D mipi_dsi_dcs_exit_sleep_mode(dsi);
        if (ret < 0) {
                dev_err(dev, "Failed to exit sleep mode: %d\n", ret);
                return ret;
        }
        usleep_range(10000, 11000);

        mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);

        ret =3D mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK=
);
        if (ret < 0) {
                dev_err(dev, "Failed to set tear on: %d\n", ret);
                return ret;
        }

        mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
        mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);
        mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x07);
        mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x12);
        mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
        mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);
        mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);

        ret =3D mipi_dsi_dcs_set_display_on(dsi);
        if (ret < 0) {
                dev_err(dev, "Failed to set display on: %d\n", ret);
                return ret;
        }

        return 0;
}

Isn't this just the same display controller with a different configuration?
Especially the sleep ranges are even the same.

I almost feel like buying these phones just to pry them apart and put
under a microscope to figure out what these displays actually contain.

Yours,
Linus Walleij