Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
MIME-Version: 1.0
References: <20230626-provable-angrily-81760e8c3cc6@wendy> <20230626-sensuous-clothing-124f7ae0aedf@wendy>
 <CALs-HstDV3PjBk_8WDecwuvVK9rno1CKFzT1+8ohoUXE7X0GwA@mail.gmail.com> <20230628-gizzard-trading-a5f9785128b5@spud>
In-Reply-To: <20230628-gizzard-trading-a5f9785128b5@spud>
From:   Evan Green <evan@rivosinc.com>
Date:   Wed, 28 Jun 2023 10:50:55 -0700
Message-ID: <CALs-HsvdXu+Ag50FpdCRthZamP+pzsqhxr2rnA+=Ko_sZ98z9A@mail.gmail.com>
Subject: Re: [PATCH v1 6/9] RISC-V: add single letter extensions to riscv_isa_ext
To:     Conor Dooley <conor@kernel.org>
Cc:     Conor Dooley <conor.dooley@microchip.com>, palmer@dabbelt.com,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Andrew Jones <ajones@ventanamicro.com>,
        Heiko Stuebner <heiko.stuebner@vrull.eu>,
        Sunil V L <sunilvl@ventanamicro.com>,
        linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
Precedence: bulk

On Wed, Jun 28, 2023 at 10:43=E2=80=AFAM Conor Dooley <conor@kernel.org> wr=
ote:
>
> On Wed, Jun 28, 2023 at 10:33:20AM -0700, Evan Green wrote:
> > On Mon, Jun 26, 2023 at 4:21=E2=80=AFAM Conor Dooley <conor.dooley@micr=
ochip.com> wrote:
> > >
> > > So that riscv_fill_hwcap() can use riscv_isa_ext to probe for single
> > > letter extensions, add them to it. riscv_isa_ext_data grows a new
> > > member, signifying whether an extension is multi-letter & thus requir=
ing
> > > special handling.
> > > As a result, what gets spat out in /proc/cpuinfo will become borked, =
as
> > > single letter extensions will be printed as part of the base extensio=
ns
> > > and while printing from riscv_isa_arr. Take the opportunity to unify =
the
> > > printing of the isa string, using the new member of riscv_isa_ext_dat=
a
> > > in the process.
> > >
> > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > > ---
> > >  arch/riscv/include/asm/hwcap.h |  1 +
> > >  arch/riscv/kernel/cpu.c        | 36 ++++++----------------
> > >  arch/riscv/kernel/cpufeature.c | 56 +++++++++++++++++++++-----------=
--
> > >  3 files changed, 46 insertions(+), 47 deletions(-)
> > >
> > > diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/=
hwcap.h
> > > index a35bee219dd7..6ad896dc4342 100644
> > > --- a/arch/riscv/include/asm/hwcap.h
> > > +++ b/arch/riscv/include/asm/hwcap.h
> > > @@ -77,6 +77,7 @@ unsigned long riscv_get_elf_hwcap(void);
> > >  struct riscv_isa_ext_data {
> > >         const unsigned int id;
> > >         const char *name;
> > > +       const bool multi_letter;
> >
> > Instead of defining a new member, could we just infer this by making a
> > macro like #define MULTI_LETTER(name) (name[0] && name[1])?
>
> Or don't even try to be clever like this and just call strnlen on the
> name & check if it is 1? It's only used in 2 places.

Sounds good to me!