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Thu, 29 Jun 2023 01:26:39 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Vitaly Grinberg Date: Thu, 29 Jun 2023 11:26:28 +0300 Message-ID: Subject: Re: [RFC PATCH v8 00/10] Create common DPLL configuration API To: Jiri Pirko Cc: "Kubalewski, Arkadiusz" , David Airlie , andy.ren@getcruise.com, anthony.l.nguyen@intel.com, arnd@arndb.de, axboe@kernel.dk, Benjamin Tissoires , claudiajkang@gmail.com, corbet@lwn.net, davem@davemloft.net, edumazet@google.com, geert+renesas@glider.be, gregkh@linuxfoundation.org, hkallweit1@gmail.com, idosch@nvidia.com, intel-wired-lan@lists.osuosl.org, jacek.lawrynowicz@linux.intel.com, Javier Martinez Canillas , jesse.brandeburg@intel.com, jonathan.lemon@gmail.com, kuba@kernel.org, kuniyu@amazon.com, leon@kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rdma@vger.kernel.org, linux@zary.sk, liuhangbin@gmail.com, lucien.xin@gmail.com, masahiroy@kernel.org, michal.michalik@intel.com, milena.olech@intel.com, Michal Schmidt , Michael Tsirkin , netdev@vger.kernel.org, nicolas.dichtel@6wind.com, nipun.gupta@amd.com, ogabbay@kernel.org, Paolo Abeni , phil@nwl.cc, Petr Oros , razor@blackwall.org, ricardo.canuelo@collabora.com, richardcochran@gmail.com, saeedm@nvidia.com, sj@kernel.org, tzimmermann@suse.de, vadfed@fb.com, vadfed@meta.com, vadim.fedorenko@linux.dev Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H5,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Jiri, We are pushing for it to be implemented in Intel Ice driver. Thanks, Vitaly On Thu, Jun 29, 2023 at 11:22=E2=80=AFAM Jiri Pirko wrot= e: > > Thu, Jun 22, 2023 at 09:44:19AM CEST, vgrinber@redhat.com wrote: > >Hi, > >Could it be possible to add PPS DPLL phase offset to the netlink API? We > >are relying on it in the E810-based grandmaster implementation. > > In which driver you need to implement this? > > > >Thanks, > >Vitaly >