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Date:   Thu, 29 Jun 2023 15:37:04 -0500
From:   Bjorn Helgaas <helgaas@kernel.org>
To:     Lizhi Hou <lizhi.hou@amd.com>
Cc:     linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, robh@kernel.org, max.zhen@amd.com,
        sonal.santan@amd.com, stefano.stabellini@xilinx.com
Subject: Re: [PATCH V10 3/5] PCI: Add quirks to generate device tree node for
 Xilinx Alveo U50
Message-ID: <20230629203704.GA446887@bhelgaas>
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In-Reply-To: <1688059190-4225-4-git-send-email-lizhi.hou@amd.com>
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On Thu, Jun 29, 2023 at 10:19:48AM -0700, Lizhi Hou wrote:
> The Xilinx Alveo U50 PCI card exposes multiple hardware peripherals on
> its PCI BAR. The card firmware provides a flattened device tree to
> describe the hardware peripherals on its BARs. This allows U50 driver to
> load the flattened device tree and generate the device tree node for
> hardware peripherals underneath.
> 
> To generate device tree node for U50 card, add PCI quirks to call
> of_pci_make_dev_node() for U50.
> 
> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com>

Acked-by: Bjorn Helgaas <bhelgaas@google.com>

I already gave my ack for v9, so ideally you would add that before
posting the v10.  But here it is again :)

> ---
>  drivers/pci/quirks.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index c525867760bf..7776012eb03f 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -6041,3 +6041,15 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a2d, dpc_log_size);
>  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a2f, dpc_log_size);
>  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a31, dpc_log_size);
>  #endif
> +
> +/*
> + * For a PCI device with multiple downstream devices, its driver may use
> + * a flattened device tree to describe the downstream devices.
> + *
> + * To overlay the flattened device tree, the PCI device and all its ancestor
> + * devices need to have device tree nodes on system base device tree. Thus,
> + * before driver probing, it might need to add a device tree node as the final
> + * fixup.
> + */
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_XILINX, 0x5020, of_pci_make_dev_node);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_XILINX, 0x5021, of_pci_make_dev_node);
> -- 
> 2.34.1
>