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Message-ID: <b13c8010-c7bb-db21-44c5-06e95b341b7c@quicinc.com>
Date:   Fri, 30 Jun 2023 20:27:53 +0530
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Subject: Re: [PATCH v4 19/21] firmware: scm: Modify only the download bits in
 TCSR register
Content-Language: en-US
To:     Konrad Dybcio <konrad.dybcio@linaro.org>, <corbet@lwn.net>,
        <agross@kernel.org>, <andersson@kernel.org>, <robh+dt@kernel.org>,
        <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
        <keescook@chromium.org>, <tony.luck@intel.com>,
        <gpiccoli@igalia.com>, <mathieu.poirier@linaro.org>,
        <catalin.marinas@arm.com>, <will@kernel.org>,
        <linus.walleij@linaro.org>, <andy.shevchenko@gmail.com>
CC:     <linux-doc@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-hardening@vger.kernel.org>,
        <linux-remoteproc@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-gpio@vger.kernel.org>
References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com>
 <1687955688-20809-20-git-send-email-quic_mojha@quicinc.com>
 <d5c5671f-b6a8-9e97-f917-784dffed7f90@linaro.org>
From:   Mukesh Ojha <quic_mojha@quicinc.com>
In-Reply-To: <d5c5671f-b6a8-9e97-f917-784dffed7f90@linaro.org>
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On 6/28/2023 8:50 PM, Konrad Dybcio wrote:
> On 28.06.2023 14:34, Mukesh Ojha wrote:
>> CrashDump collection is based on the DLOAD bit of TCSR register.
>> To retain other bits, we read the register and modify only the
>> DLOAD bit as the other bits have their own significance.
>>
>> Co-developed-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com>
>> Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
>> ---
>>   drivers/firmware/qcom_scm.c | 12 ++++++++++--
>>   1 file changed, 10 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
>> index 104d86e49b97..a9ff77d16c42 100644
>> --- a/drivers/firmware/qcom_scm.c
>> +++ b/drivers/firmware/qcom_scm.c
>> @@ -30,6 +30,11 @@ module_param(download_mode, bool, 0);
>>   #define SCM_HAS_IFACE_CLK	BIT(1)
>>   #define SCM_HAS_BUS_CLK		BIT(2)
>>   
>> +#define QCOM_DOWNLOAD_FULLDUMP		 0x1
>> +#define QCOM_DOWNLOAD_NODUMP		 0x0
>> +#define QCOM_DOWNLOAD_MODE_SHIFT	   4
>> +#define QCOM_DOWNLOAD_MODE_MASK		0x30
> GENMASK and then FIELD_PREP below?

Just checked about FIELD_PREP, it works, thanks.

FIELD_PREP(GENMASK(5, 4), QCOM_DOWNLOAD_FULLDUMP)
FIELD_PREP(GENMASK(5, 4), QCOM_DOWNLOAD_NODUMP)

-Mukesh

> 
>> +
>>   struct qcom_scm {
>>   	struct device *dev;
>>   	struct clk *core_clk;
>> @@ -440,6 +445,7 @@ static int __qcom_scm_set_dload_mode(struct device *dev, bool enable)
>>   static void qcom_scm_set_download_mode(bool enable)
>>   {
>>   	bool avail;
>> +	int val;
> What's wrong with initializing it in the same line as ret?
> 
>>   	int ret = 0;
>>   
>>   	avail = __qcom_scm_is_call_available(__scm->dev,
>> @@ -448,8 +454,10 @@ static void qcom_scm_set_download_mode(bool enable)
>>   	if (avail) {
>>   		ret = __qcom_scm_set_dload_mode(__scm->dev, enable);
>>   	} else if (__scm->dload_mode_addr) {
>> -		ret = qcom_scm_io_writel(__scm->dload_mode_addr,
>> -				enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0);
>> +		val = (enable ? QCOM_DOWNLOAD_FULLDUMP : QCOM_DOWNLOAD_NODUMP);
> unnecessary braces
> 
> Konrad
>> +		val <<= QCOM_DOWNLOAD_MODE_SHIFT;
>> +		ret = qcom_scm_io_update_field(__scm->dload_mode_addr,
>> +				QCOM_DOWNLOAD_MODE_MASK, val);
>>   	} else {
>>   		dev_err(__scm->dev,
>>   			"No available mechanism for setting download mode\n");