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Date:   Sun, 2 Jul 2023 00:03:10 +0100
From:   Conor Dooley <conor@kernel.org>
To:     Walker Chen <walker.chen@starfivetech.com>,
        Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>,
        Vinod Koul <vkoul@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor.dooley@microchip.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Emil Renner Berthing <emil.renner.berthing@canonical.com>,
        dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v6 4/4] riscv: dts: starfive: add dma controller node
Message-ID: <20230702-scallop-unsafe-9a02b511c95d@spud>
References: <20230322094820.24738-1-walker.chen@starfivetech.com>
 <20230322094820.24738-5-walker.chen@starfivetech.com>
 <ZKCiOQ0IuptKO8kr@aurel32.net>
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On Sun, Jul 02, 2023 at 12:01:29AM +0200, Aurelien Jarno wrote:
> On 2023-03-22 17:48, Walker Chen wrote:
> > Add the dma controller node for the Starfive JH7110 SoC.
> >=20
> > Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> > Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
> > ---
> >  arch/riscv/boot/dts/starfive/jh7110.dtsi | 18 ++++++++++++++++++
> >  1 file changed, 18 insertions(+)
> >=20
> > diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot=
/dts/starfive/jh7110.dtsi
> > index 17220576b21c..b503b6137743 100644
> > --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> > +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> > @@ -510,6 +510,24 @@
> >  			#gpio-cells =3D <2>;
> >  		};
> > =20
> > +		dma: dma-controller@16050000 {
> > +			compatible =3D "starfive,jh7110-axi-dma";
> > +			reg =3D <0x0 0x16050000 0x0 0x10000>;
> > +			clocks =3D <&stgcrg JH7110_STGCLK_DMA1P_AXI>,
> > +				 <&stgcrg JH7110_STGCLK_DMA1P_AHB>;
> > +			clock-names =3D "core-clk", "cfgr-clk";
> > +			resets =3D <&stgcrg JH7110_STGRST_DMA1P_AXI>,
> > +				 <&stgcrg JH7110_STGRST_DMA1P_AHB>;
> > +			interrupts =3D <73>;
> > +			#dma-cells =3D <1>;
> > +			dma-channels =3D <4>;
> > +			snps,dma-masters =3D <1>;
> > +			snps,data-width =3D <3>;
> > +			snps,block-size =3D <65536 65536 65536 65536>;
> > +			snps,priority =3D <0 1 2 3>;
> > +			snps,axi-max-burst-len =3D <16>;
> > +		};
> > +
> >  		aoncrg: clock-controller@17000000 {
> >  			compatible =3D "starfive,jh7110-aoncrg";
> >  			reg =3D <0x0 0x17000000 0x0 0x10000>;
>=20
> It appears that this patch has never been applied, although the rest of
> the series has already been merged.

Correct. I can't apply it because the stgcrg it depends on is still
pending.

> Unfortunately it doesn't apply
> anymore due to other changes to that file.
>=20
> Could you please rebase and repost it?


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