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Date:   Mon, 3 Jul 2023 09:16:33 +0100
From:   Conor Dooley <conor.dooley@microchip.com>
To:     =?utf-8?B?6L+Q6L6J5bSU?= <cuiyunhui@bytedance.com>
CC:     Conor Dooley <conor@kernel.org>, <ardb@kernel.org>,
        <palmer@dabbelt.com>, <paul.walmsley@sifive.com>,
        <aou@eecs.berkeley.edu>, <linux-riscv@lists.infradead.org>,
        <rminnich@gmail.com>, <mark.rutland@arm.com>,
        <lpieralisi@kernel.org>, <rafael@kernel.org>, <lenb@kernel.org>,
        <jdelvare@suse.com>, <yc.hung@mediatek.com>,
        <angelogioacchino.delregno@collabora.com>,
        <allen-kh.cheng@mediatek.com>,
        <pierre-louis.bossart@linux.intel.com>,
        <tinghan.shen@mediatek.com>, <linux-kernel@vger.kernel.org>,
        <linux-acpi@vger.kernel.org>, <geshijian@bytedance.com>,
        <weidong.wd@bytedance.com>
Subject: Re: [External] Re: [PATCH v2 3/3] riscv: obtain SMBIOS entry from
 FFI.
Message-ID: <20230703-escapist-granny-14faea3ab0ef@wendy>
References: <20230702095735.860-1-cuiyunhui@bytedance.com>
 <20230702095735.860-3-cuiyunhui@bytedance.com>
 <20230702-confiding-aqueduct-25c3c2852de3@spud>
 <CAEEQ3wkaazkV9MrfvWQMSXixtqahgdYVe=GT9ZZJnW-r1AQ1aA@mail.gmail.com>
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On Mon, Jul 03, 2023 at 03:50:57PM +0800, =E8=BF=90=E8=BE=89=E5=B4=94 wrote:
> On Sun, Jul 2, 2023 at 8:42=E2=80=AFPM Conor Dooley <conor@kernel.org> wr=
ote:
> >
> > Hey,
> >
> > On Sun, Jul 02, 2023 at 05:57:34PM +0800, Yunhui Cui wrote:
> > > When we bringup with coreboot on riscv, we need to obtain
> > > the entry address of SMBIOS through the FFI scheme.
> >
> > What do you need it for?
> RISC-V will be server-oriented, and the system needs to be managed
> based on SMBIOS.

Really what this commit message is missing is something that explains
why you need the FFI scheme. Say along the lines of:

	Coreboot on RISC-V does not support EFI, and needs to use the
	FDT Firmware Interface (FFI) to pass the entry address of SMBIOS
	to the kernel.

Cheers,
Conor.

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Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZKKD4QAKCRB4tDGHoIJi
0k2HAP9pmxxbrgHQrz6OmhH0sGOVhQtFoasv1XCYd14s7Vbq5wEAyAL2LCy+I4Bg
n7AZ/WcCZ+tcNDDs4NqNvkDFVNURsQA=
=dPYG
-----END PGP SIGNATURE-----

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