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bh=rYrikqEYLAou4pnYR2Aq6pNjv0Vdk8l8/0T1K6ojTeg=; b=NYxHOTcGoG21PeuUuCrK2uAChh2QlGAyw81ugyHulAmE8HQLIIRgSDqeAZ7qEmGthc 0wvVoMdsXlIV3uNvc/LsIvni/N56rGPzwlK8J6ERidxbMaGL/fdyh+x5M6xvdBreFo4e PJtiZSX5HkSXWdpGH1qcubfwJ2RhwzP19P5bqv8CdEAn+tA/4SXGokj7wulDMwxf+PiA LkWB4Y9EyNAWtvZf+sO2z1weMwx/sPGY3EdLIe1pQn40hLGklshjFE0CNe3YW8CFc3tf WS227H7nG9kAcP9vlPuWuiqG46mCrq8+PU2Y7WnkMm68rK/TvdxBDXvf4YBQ4bh3nmj2 d+pw== X-Gm-Message-State: AC+VfDzJT7mXazZ/3/Om7GP9CIOWPzGfevsXTP2wVuVnIP1Vynq2tNbC u8rjpPp340lqZCAicryNaQnvCHAEhlAB8rvCsQNLsQ== X-Received: by 2002:a05:600c:3787:b0:3fa:8c67:fc43 with SMTP id o7-20020a05600c378700b003fa8c67fc43mr8267813wmr.32.1688377510814; Mon, 03 Jul 2023 02:45:10 -0700 (PDT) MIME-Version: 1.0 References: <20230630083013.102334-1-alexghiti@rivosinc.com> <20230630083013.102334-9-alexghiti@rivosinc.com> <20230630-f714cc46ee65cc65318f2ada@orel> In-Reply-To: <20230630-f714cc46ee65cc65318f2ada@orel> From: Alexandre Ghiti Date: Mon, 3 Jul 2023 11:45:00 +0200 Message-ID: Subject: Re: [PATCH v3 08/10] Documentation: admin-guide: Add riscv sysctl_perf_user_access To: Andrew Jones Cc: Jonathan Corbet , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Paul Walmsley , Palmer Dabbelt , Albert Ou , Atish Patra , Anup Patel , Will Deacon , Rob Herring , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jun 30, 2023 at 1:16=E2=80=AFPM Andrew Jones wrote: > > On Fri, Jun 30, 2023 at 10:30:11AM +0200, Alexandre Ghiti wrote: > > riscv now uses this sysctl so document its usage for this architecture. > > > > Signed-off-by: Alexandre Ghiti > > --- > > Documentation/admin-guide/sysctl/kernel.rst | 26 +++++++++++++++++---- > > 1 file changed, 22 insertions(+), 4 deletions(-) > > > > diff --git a/Documentation/admin-guide/sysctl/kernel.rst b/Documentatio= n/admin-guide/sysctl/kernel.rst > > index d85d90f5d000..c376692b372b 100644 > > --- a/Documentation/admin-guide/sysctl/kernel.rst > > +++ b/Documentation/admin-guide/sysctl/kernel.rst > > @@ -941,16 +941,34 @@ enabled, otherwise writing to this file will retu= rn ``-EBUSY``. > > The default value is 8. > > > > > > -perf_user_access (arm64 only) > > -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > +perf_user_access (arm64 and riscv only) > > +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > + > > +Controls user space access for reading perf event counters. > > > > -Controls user space access for reading perf event counters. When set t= o 1, > > -user space can read performance monitor counter registers directly. > > +arm64 > > +=3D=3D=3D=3D=3D > > > > The default value is 0 (access disabled). > > Should add a blank line here. Done, thanks > > > +When set to 1, user space can read performance monitor counter registe= rs > > +directly. > > > > See Documentation/arm64/perf.rst for more information. > > > > +riscv > > +=3D=3D=3D=3D=3D > > + > > +When set to 0, user access is disabled. > > + > > +When set to 1, user space can read performance monitor counter registe= rs > > +directly only through perf, any direct access without perf interventio= n will > > Remove 'directly only' > > (It can't be both "direct" and "through" at the same time.) > > > +trigger an illegal instruction. > > + > > +The default value is 2, > > This is no longer true. Damn, sorry about that. > > > which enables legacy mode (user space has direct > > +access to cycle and insret CSRs only). Note that this legacy value > > +is deprecated and will be removed once all userspace applications are = fixed. > > + > > +Note that the time CSR is for now always accessible to all modes. > > s/always accessible/always directly accessible/ > > Also, remove 'for now'. While we may change this in the future, I'm not > sure if the 'for now' helps much. Maybe a "This may change in the future.= " > type of sentence? Or, just nothing (for now :-) and we'll modify this > document if it changes later. I won't say anything about the future, thanks! I also harmonized the "user space" and "userspace" in this document with what arm64 does. Thanks > > Thanks, > drew > > > > > pid_max > > =3D=3D=3D=3D=3D=3D=3D > > -- > > 2.39.2 > >