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[209.85.128.169]) by smtp.gmail.com with ESMTPSA id 132-20020a25168a000000b00bcc9793c3e6sm4398729ybw.65.2023.07.03.07.49.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 03 Jul 2023 07:49:42 -0700 (PDT) Received: by mail-yw1-f169.google.com with SMTP id 00721157ae682-5703cb4bcb4so48058897b3.3; Mon, 03 Jul 2023 07:49:42 -0700 (PDT) X-Received: by 2002:a25:15c1:0:b0:bfe:77f1:f454 with SMTP id 184-20020a2515c1000000b00bfe77f1f454mr8566617ybv.51.1688395782355; Mon, 03 Jul 2023 07:49:42 -0700 (PDT) MIME-Version: 1.0 References: <20230623080135.15696-1-fabrizio.castro.jz@renesas.com> In-Reply-To: From: Geert Uytterhoeven Date: Mon, 3 Jul 2023 16:49:30 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] arm64: dts: renesas: rzv2mevk2: Fix eMMC/SDHI pinctrl names To: Linus Walleij , Fabrizio Castro Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Chris Paterson , Biju Das , Lad Prabhakar , "open list:GPIO SUBSYSTEM" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-1.4 required=5.0 tests=BAYES_00, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Linus, Fabrizio, On Sat, Jun 24, 2023 at 9:12 PM Linus Walleij wrote: > On Fri, Jun 23, 2023 at 10:40 AM Geert Uytterhoeven > wrote: > > On Fri, Jun 23, 2023 at 10:01 AM Fabrizio Castro > > wrote: > > > pinctrl-rzv2m b6250000.pinctrl: pin P8_2 already requested by 85000000.mmc; cannot claim for 85020000.mmc > > > pinctrl-rzv2m b6250000.pinctrl: pin-130 (85020000.mmc) status -22 > > > renesas_sdhi_internal_dmac 85020000.mmc: Error applying setting, reverse things back I managed to reproduce the issue[*], and devised a fix, which I will send shortly. > > To me, that sounds like a bug in the pinctrl core. > > Or am I missing something? > > The pin control core tracks on a per-pin basis, it has no clue about > the name of certain dt nodes. > > This bug would be in the DT parsing code for the different states > I think, and rzv2m is not using the core helpers for this but > rather rzv2m_dt_subnode_to_map() etc. Indeed, there's an issue in rzv2m_dt_subnode_to_map(): it registers groups and functions using just the subnode names, which may not be unique. When this happens, they are ignored silently. $ cat /sys/kernel/debug/pinctrl/b6250000.pinctrl/pingroups registered pin groups: group: data pin 130 (P8_2) pin 131 (P8_3) pin 132 (P8_4) pin 133 (P8_5) group: ctrl pin 128 (P8_0) pin 129 (P8_1) group: cd pin 135 (P8_7) $ cat /sys/kernel/debug/pinctrl/b6250000.pinctrl/pinmux-functions function 0: data, groups = [ data ] function 1: ctrl, groups = [ ctrl ] function 2: cd, groups = [ cd ] You can see this by adding checks in the pin control core: --- a/drivers/pinctrl/core.c +++ b/drivers/pinctrl/core.c @@ -639,8 +639,10 @@ int pinctrl_generic_add_group(struct pinctrl_dev *pctldev, const char *name, return -EINVAL; selector = pinctrl_generic_group_name_to_selector(pctldev, name); - if (selector >= 0) + if (selector >= 0) { + pr_err("Duplicate group name %s (selector %d)\n", name, selector); return selector; + } selector = pctldev->num_groups; --- a/drivers/pinctrl/pinmux.c +++ b/drivers/pinctrl/pinmux.c @@ -878,8 +878,10 @@ int pinmux_generic_add_function(struct pinctrl_dev *pctldev, return -EINVAL; selector = pinmux_func_name_to_selector(pctldev, name); - if (selector >= 0) + if (selector >= 0) { +pr_err("Duplicate function name %s (selector %d)\n", name, selector); return selector; + } selector = pctldev->num_functions; Is there any special reason why such duplicates are just ignored, and not flagged as an error? The RZ/G2L and RZ/N1 pin control drivers have the same issue, but it is not triggered on these platforms (yet), as their DTS files either do not use subnodes, or use unique subnode names. The RZ/A1 and RZ/A2 pin control drivers are not affected, as they do not support subnodes. The StarFive JH7100 pin control driver does it right, by constructing group/function names from both the node and the subnode names. [*] As I do not have an RZ/V2M board, I added pin control, eMMC, and SDHI snippets from RZ/V2M to the Koelsch DTS, and modified the drivers to not touch the non-existing hardware. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds