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From:   Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date:   Mon, 3 Jul 2023 21:39:18 +0200
Message-ID: <CAFBinCCLt-o_QX0izmtzs8MA=ETMAhEib3KDr-6Z66n__GVkyA@mail.gmail.com>
Subject: Re: [PATCH v3 5/5] meson saradc: support reading from channel 7 mux inputs
To:     Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc:     George Stark <gnstark@sberdevices.ru>, jic23@kernel.org,
        lars@metafoo.de, neil.armstrong@linaro.org, khilman@baylibre.com,
        jbrunet@baylibre.com, andriy.shevchenko@linux.intel.com,
        nuno.sa@analog.com, linux-iio@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        linux-amlogic@lists.infradead.org, kernel@sberdevices.ru
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Hi Jonathan,

On Sun, Jul 2, 2023 at 11:21=E2=80=AFAM Jonathan Cameron
<Jonathan.Cameron@huawei.com> wrote:
[...]
> > @@ -235,6 +249,27 @@ enum meson_sar_adc_channel_index {
> >       NUM_CHAN_7,
> >       NUM_CHAN_TEMP,
> >       NUM_CHAN_SOFT_TIMESTAMP,
>
> Silly question... Why does this device have timestamp channels?
> It has no buffer support so they don't 'do anything'.
> If it had then putting other channels after that might have broken
> things if not done very carefully (hence I went looking)
This question is probably for me (not George).
The answer is simple: when I wrote the Meson SAR ADC driver I looked
at various other drivers (but can't recall which ones exactly). One of
them probably used a soft timestamp channel so I also added that to
meson_saradc. Since "it didn't break anything" I thought it would be
fine.

Newer SAR ADC IP blocks have buffer support, but that's not
implemented in the driver (yet).
So if I understand you correctly we can drop the soft timestamp
channel (with a dedicated patch in this series)?


Best regards,
Martin