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[83.9.29.26]) by smtp.gmail.com with ESMTPSA id w27-20020a05651204db00b004fba7edc6cesm1991365lfq.7.2023.07.03.13.15.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Jul 2023 13:15:30 -0700 (PDT) From: Konrad Dybcio Subject: [PATCH v2 0/4] Add interconnects to QUPs on SM8250 Date: Mon, 03 Jul 2023 22:15:24 +0200 Message-Id: <20230703-topic-8250_qup_icc-v2-0-9ba0a9460be2@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAFwso2QC/32NQQqDMBAAvyI5NyUm1die+o8ism5XXZDEJiot4 t+b+oAeZ2CYTUQKTFHcsk0EWjmydwn0KRM4gOtJ8jOx0EobZZWRs58YZaUL1byWqWFEWea2rMB c0BKKFLYQSbYBHA4pdcs4JjkF6vh9nB514oHj7MPnGK/5z/59rLlUsiMwVwBlC13cR3YQ/NmHX tT7vn8BgyzMtsoAAAA= To: Andy Gross , Bjorn Andersson , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Andi Shyti , Georgi Djakov , Odelu Kukatla , Jonathan Marek , Sibi Sankar Cc: Marijn Suijten , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1688415328; l=1365; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=dPT2roZiTmdQmO/AOJA7mh/BGKezhgAf87PZ1MFFvgg=; b=YYNXe31KSRcf7Lk7nGQU5Xt0Jfhyz/T8zQ6WxbFjMq5eCquktEC2yJaN7vfHXBu+lgFjrcHIa A/Sq/fnZE+7Dfn0irrsXaCOk9Ng3RRcXVYrA2snsERBhkcvmRayf47M X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org SM8250 (like SM8150 but unlike all other QUP-equipped SoCs) doesn't provide a qup-core path. Adjust the bindings and drivers as necessary, and then describe the icc paths in the device tree. This makes it possible for interconnect sync_state succeed so long as you don't use UFS. Signed-off-by: Konrad Dybcio --- Changes in v2: - drop everything, fix icc instead of messing with bindings - Link to v1: https://lore.kernel.org/r/20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org --- Konrad Dybcio (4): dt-bindings: interconnect: qcom,rpmh: Add SM8250 QUP virt dt-bindings: interconnect: qcom,sm8250: Add QUP virt interconnect: qcom: sm8250: Fix QUP0 nodes arm64: dts: qcom: sm8250: Add interconnects and power-domains to QUPs .../bindings/interconnect/qcom,rpmh.yaml | 18 +- arch/arm64/boot/dts/qcom/sm8250.dtsi | 286 +++++++++++++++++++++ drivers/interconnect/qcom/sm8250.c | 74 +++++- drivers/interconnect/qcom/sm8250.h | 6 + include/dt-bindings/interconnect/qcom,sm8250.h | 7 + 5 files changed, 384 insertions(+), 7 deletions(-) --- base-commit: 296d53d8f84ce50ffaee7d575487058c8d437335 change-id: 20230703-topic-8250_qup_icc-61768a34c7ec Best regards, -- Konrad Dybcio