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Date:   Mon, 3 Jul 2023 21:16:18 -0500
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Subject: Re: [PATCH 3/4] pinctrl: amd: Unify debounce handling into
 amd_pinconf_set()
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To:     andy.shevchenko@gmail.com
Cc:     Basavaraj.Natikar@amd.com, Shyam-sundar.S-k@amd.com,
        linus.walleij@linaro.org, npliashechnikov@gmail.com,
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References: <20230630194716.6497-1-mario.limonciello@amd.com>
 <20230630194716.6497-4-mario.limonciello@amd.com>
 <ZKM-rde5VyTScJHC@surfacebook>
From:   Mario Limonciello <mario.limonciello@amd.com>
In-Reply-To: <ZKM-rde5VyTScJHC@surfacebook>
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On 7/3/23 16:33, andy.shevchenko@gmail.com wrote:
> Fri, Jun 30, 2023 at 02:47:15PM -0500, Mario Limonciello kirjoitti:
>> Debounce handling is done in two different entry points in the driver.
>> Unify this to make sure that it's always handled the same.
> 
> ...
> 
>> -static int amd_gpio_set_debounce(struct gpio_chip *gc, unsigned offset,
>> -		unsigned debounce)
>> +static int amd_gpio_set_debounce(struct amd_gpio *gpio_dev, unsigned offset,
>> +				 unsigned debounce)
> 
> Side note: Are you going to fix unsigned --> unsigned int?
> The former is discouraged.
> 
> ...
> 
>> +out:
> 
> out_unlock: ?
> 
>>   	raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
>>   
>>   	return ret;
> 

Ack, thanks will adjust both.