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References: <20230704143628.1177124-1-james.clark@arm.com>
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From:   Ian Rogers <irogers@google.com>
Date:   Tue, 4 Jul 2023 10:10:00 -0700
Message-ID: <CAP-5=fVzFsgh6PC2EPJi8XpwTpdoSqqNnLgM-AYeHLzCWiQwZw@mail.gmail.com>
Subject: Re: [PATCH 1/2] perf test: Fix event parsing test on Arm
To:     James Clark <james.clark@arm.com>
Cc:     linux-perf-users@vger.kernel.org,
        Peter Zijlstra <peterz@infradead.org>,
        Ingo Molnar <mingo@redhat.com>,
        Arnaldo Carvalho de Melo <acme@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Jiri Olsa <jolsa@kernel.org>,
        Namhyung Kim <namhyung@kernel.org>,
        Adrian Hunter <adrian.hunter@intel.com>,
        linux-kernel@vger.kernel.org
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On Tue, Jul 4, 2023 at 7:38=E2=80=AFAM James Clark <james.clark@arm.com> wr=
ote:
>
> The test looks for a PMU from sysfs with type =3D PERF_TYPE_RAW when
> opening a raw event. Arm doesn't have a real raw PMU, only core PMUs
> with unique types other than raw.
>
> Instead of looking for a matching PMU, just test that the event type
> was parsed as raw and skip the PMU search on Arm. The raw event type
> test should also apply to all platforms so add it outside of the ifdef.
>
> Fixes: aefde50a446b ("perf test: Fix parse-events tests for >1 core PMU")
> Signed-off-by: James Clark <james.clark@arm.com>

Acked-by: Ian Rogers <irogers@google.com>

Thanks,
Ian

> ---
>  tools/perf/tests/parse-events.c | 14 +++++++++++++-
>  1 file changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/tools/perf/tests/parse-events.c b/tools/perf/tests/parse-eve=
nts.c
> index 133218e51ab4..21f79aa31233 100644
> --- a/tools/perf/tests/parse-events.c
> +++ b/tools/perf/tests/parse-events.c
> @@ -108,10 +108,21 @@ static int test__checkevent_raw(struct evlist *evli=
st)
>         TEST_ASSERT_VAL("wrong number of entries", 0 !=3D evlist->core.nr=
_entries);
>
>         perf_evlist__for_each_evsel(&evlist->core, evsel) {
> -               struct perf_pmu *pmu =3D NULL;
> +               struct perf_pmu *pmu __maybe_unused =3D NULL;
>                 bool type_matched =3D false;
>
>                 TEST_ASSERT_VAL("wrong config", test_perf_config(evsel, 0=
x1a));
> +               TEST_ASSERT_VAL("event not parsed as raw type",
> +                               evsel->attr.type =3D=3D PERF_TYPE_RAW);
> +#if defined(__aarch64__)
> +               /*
> +                * Arm doesn't have a real raw type PMU in sysfs, so raw =
events
> +                * would never match any PMU. However, RAW events on Arm =
will
> +                * always successfully open on the first available core P=
MU
> +                * so no need to test for a matching type here.
> +                */
> +               type_matched =3D raw_type_match =3D true;
> +#else
>                 while ((pmu =3D perf_pmus__scan(pmu)) !=3D NULL) {
>                         if (pmu->type =3D=3D evsel->attr.type) {
>                                 TEST_ASSERT_VAL("PMU type expected once",=
 !type_matched);
> @@ -120,6 +131,7 @@ static int test__checkevent_raw(struct evlist *evlist=
)
>                                         raw_type_match =3D true;
>                         }
>                 }
> +#endif
>                 TEST_ASSERT_VAL("No PMU found for type", type_matched);
>         }
>         TEST_ASSERT_VAL("Raw PMU not matched", raw_type_match);
> --
> 2.34.1
>