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[83.9.29.26]) by smtp.gmail.com with ESMTPSA id x8-20020ac24888000000b004fba4e27abesm2988053lfc.241.2023.07.05.03.43.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 05 Jul 2023 03:43:12 -0700 (PDT) Message-ID: <553bd028-aaf3-b128-ae4c-7f938c23e889@linaro.org> Date: Wed, 5 Jul 2023 12:43:10 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH 02/10] dt-bindings: power: Add rpm power domains for SDX75 Content-Language: en-US To: Rohit Agarwal , agross@kernel.org, andersson@kernel.org, lee@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linus.walleij@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, sboyd@kernel.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org References: <1688395346-3126-1-git-send-email-quic_rohiagar@quicinc.com> <1688395346-3126-3-git-send-email-quic_rohiagar@quicinc.com> <0d468d08-6410-e424-b4f3-5245cdb0334a@linaro.org> <85456057-c4ef-68a6-4fc5-c9fd03b01b71@quicinc.com> <06506ed7-f861-0bca-8b87-e2da6a6bc789@quicinc.com> From: Konrad Dybcio In-Reply-To: <06506ed7-f861-0bca-8b87-e2da6a6bc789@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5.07.2023 10:54, Rohit Agarwal wrote: > > On 7/4/2023 11:47 AM, Rohit Agarwal wrote: >> >> On 7/3/2023 8:29 PM, Konrad Dybcio wrote: >>> On 3.07.2023 16:42, Rohit Agarwal wrote: >>>> Add RPM power domain bindings for the SDX75 SoC. >>>> >>>> Signed-off-by: Rohit Agarwal >>>> --- >>>>   Documentation/devicetree/bindings/power/qcom,rpmpd.yaml | 1 + >>>>   include/dt-bindings/power/qcom-rpmpd.h                  | 8 ++++++++ >>>>   2 files changed, 9 insertions(+) >>>> >>>> diff --git a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml >>>> index afad313..58e1be8 100644 >>>> --- a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml >>>> +++ b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml >>>> @@ -40,6 +40,7 @@ properties: >>>>         - qcom,sdm845-rpmhpd >>>>         - qcom,sdx55-rpmhpd >>>>         - qcom,sdx65-rpmhpd >>>> +      - qcom,sdx75-rpmhpd >>>>         - qcom,sm6115-rpmpd >>>>         - qcom,sm6125-rpmpd >>>>         - qcom,sm6350-rpmhpd >>>> diff --git a/include/dt-bindings/power/qcom-rpmpd.h b/include/dt-bindings/power/qcom-rpmpd.h >>>> index 1bf8e87..8092d0d 100644 >>>> --- a/include/dt-bindings/power/qcom-rpmpd.h >>>> +++ b/include/dt-bindings/power/qcom-rpmpd.h >>>> @@ -57,6 +57,14 @@ >>>>   #define SDX65_CX_AO    4 >>>>   #define SDX65_MXC    5 >>>>   +/* SDX75 Power Domain Indexes */ >>>> +#define SDX75_CX    0 >>>> +#define SDX75_CX_AO    1 >>>> +#define SDX75_MSS    2 >>>> +#define SDX75_MX    3 >>>> +#define SDX75_MX_AO    4 >>>> +#define SDX75_MXC    5 >>> Please instead introduce a set of defines without the SoC prefix >>> (i.e. CX, CX_AO, MX etc.). We've been putting this off for too long >>> and you're the first unlucky guy that submitted new RPMhPD support after >>> we've concluded it'd be the way to go! :D Sadly, we can't replace the >>> existing ones retroactively.. >> Surely No issues. Will update it. > > I have a doubt here. Cant we completely omit the #defines here and directly index this as 0,1,... > because if the intention of this #defines is to understand the name of the pd then we can get > it from the .name attribute in rpmhpd as well, right? > > The problems with a common set of #define would be, lets say if we define CX_AO as 1 and some platform > doesn't have CX_AO then wouldnt it leave a null entry in the driver entry of that platform? Yes. We already do this in the rpmh clock driver, as: 1. there are domains that all chips share (like CX etc.) 2. wasting a couple of bytes lets us massively save on convolution Konrad > > Thanks, > Rohit. > >> >> Thanks, >> Rohit. >>> Konrad >>>> + >>>>   /* SM6350 Power Domain Indexes */ >>>>   #define SM6350_CX    0 >>>>   #define SM6350_GFX    1