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[2620:137:e000::1:20]) by mx.google.com with ESMTP id m1-20020a17090aab0100b0025653dc2881si1766890pjq.23.2023.07.05.07.46.45; Wed, 05 Jul 2023 07:47:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=DfJpQcZ5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232618AbjGEOmn (ORCPT + 99 others); Wed, 5 Jul 2023 10:42:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232475AbjGEOmi (ORCPT ); Wed, 5 Jul 2023 10:42:38 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97B961B6; Wed, 5 Jul 2023 07:42:37 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 2DA4D61578; Wed, 5 Jul 2023 14:42:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0E85DC433C7; Wed, 5 Jul 2023 14:42:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1688568156; bh=89PZ/QaDV/f5qPoJLlgOoWPxoC4vw+BEViZ9AyZWsfg=; h=From:To:Cc:Subject:In-Reply-To:References:Date:From; b=DfJpQcZ5wYbIRdrAxfvkOEeQ58K5JIHMs2FykL5zAQ2Pv1iLJaDus12bGeMN5OIni /D0lLEsHoJ68qb2bWiEIORQV+3sph/xv9ZxP/oakwPnlxKQYcPeIwNsHH+5uX1f6+j 1zQdvnww3UBWVPg1Z2nJ0ILX7uqBx7lb05o0Fe4CQB1S5X9MWiyLXhx4xN3lsIqAWx nzrHbS1MJgvtMYBmpB+zMkSzM8iUMIDrneRNkvqK1ETFJ6vV5glD8ABGTKfKJz56pj oN3ZVXO1IctgMPpWmdDJuGm/+YEdlAeXX2T4iQFNVsFE50XMkGYWqre3TxkZUjXPpt x+hYbs5HsGqQw== From: =?utf-8?B?QmrDtnJuIFTDtnBlbA==?= To: =?utf-8?B?6L+Q6L6J5bSU?= , Jessica Clarke , Emil Renner Berthing Cc: Andrew Jones , Ard Biesheuvel , Palmer Dabbelt , Paul Walmsley , Albert Ou , linux-riscv , rminnich@gmail.com, Mark Rutland , Lorenzo Pieralisi , "Rafael J . Wysocki" , Len Brown , jdelvare@suse.com, yc.hung@mediatek.com, angelogioacchino.delregno@collabora.com, allen-kh.cheng@mediatek.com, pierre-louis.bossart@linux.intel.com, tinghan.shen@mediatek.com, linux-kernel , linux-acpi@vger.kernel.org, geshijian@bytedance.com, weidong.wd@bytedance.com Subject: Re: [External] [PATCH v2 1/3] riscv: obtain ACPI RSDP from FFI. In-Reply-To: <50F3BD62-78F1-456E-A44A-0C7D9A2D4113@jrtc27.com> References: <20230702095735.860-1-cuiyunhui@bytedance.com> <20230703-71f67eb66a037f5c0fb825c6@orel> <50F3BD62-78F1-456E-A44A-0C7D9A2D4113@jrtc27.com> Date: Wed, 05 Jul 2023 16:42:33 +0200 Message-ID: <87bkgql8rq.fsf@all.your.base.are.belong.to.us> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Jessica Clarke writes: > On 3 Jul 2023, at 19:58, Emil Renner Berthing wrote: >>=20 >> On Mon, 3 Jul 2023 at 15:33, =E8=BF=90=E8=BE=89=E5=B4=94 wrote: >>>=20 >>> Hi drew, >>>=20 >>> On Mon, Jul 3, 2023 at 9:01=E2=80=AFPM Andrew Jones wrote: >>>>=20 >>>>=20 >>>> (This is a reply to a non-existent cover letter.) >>>=20 >>> This has been discussed many times with Ard, Please refer to : >>> https://patches.linaro.org/project/linux-acpi/patch/20230426034001.16-1= -cuiyunhui@bytedance.com/ >>=20 >> Hi Yunhui, >>=20 >> From that discussion it was mentioned that that arm supports 3 methods >> of booting: >> direct + devicetree >> EFI + devicetree >> EFI + ACPI >> ..but not >> direct + ACPI >>=20 >> To me it isn't obvious from that or this thread, and since arm seems >> to be doing fine without the 4th option I'm curious why that's >> necessary on riscv? > > If anything we should be removing option 1, because that=E2=80=99s not a > cross-OS standard (though RISC-V=E2=80=99s SBI direct booting is at least= not > tied to the OS). Any application-class platform spec is going to > mandate EFI, because, whatever your thoughts of EFI are, that is *the* > standard. And if you=E2=80=99re willing to pick up all the complexity of = ACPI, > what=E2=80=99s a bit of EFI (especially if you only go for a minimal one = a la > U-Boot)? Well said! Yunhui, why not simply add a minimal UEFI stub to Coreboot (like Jess points out above)? IMO what U-boot (or https://github.com/cloud-hypervisor/rust-hypervisor-firmware if you're into Rust ;-)) is doing, and just having a small UEFI shim is the way to go.