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Date:   Wed, 5 Jul 2023 10:43:00 -0700
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Subject: Re: [PATCH] cxl/mem: Fix a double shift bug
To:     Dan Carpenter <dan.carpenter@linaro.org>,
        Vishal Verma <vishal.l.verma@intel.com>
CC:     Alison Schofield <alison.schofield@intel.com>,
        Ira Weiny <ira.weiny@intel.com>,
        Ben Widawsky <bwidawsk@kernel.org>,
        Dan Williams <dan.j.williams@intel.com>,
        Jonathan Cameron <Jonathan.Cameron@huawei.com>,
        <linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <kernel-janitors@vger.kernel.org>
References: <a11b0c78-4717-4f4e-90be-f47f300d607c@moroto.mountain>
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From:   Dave Jiang <dave.jiang@intel.com>
In-Reply-To: <a11b0c78-4717-4f4e-90be-f47f300d607c@moroto.mountain>
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On 7/3/23 07:17, Dan Carpenter wrote:
> The CXL_FW_CANCEL macro is used with set/test_bit() so it should be a
> bit number and not the shifted value.  The original code is the
> equivalent of using BIT(BIT(0)) so it's 0x2 instead of 0x1.  This has
> no effect on runtime because it's done consistently and nothing else
> was using the 0x2 bit.
> 
> Fixes: 9521875bbe00 ("cxl: add a firmware update mechanism using the sysfs firmware loader")
> Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>

Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> ---
>   drivers/cxl/cxlmem.h | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
> index 79e99c873ca2..499113328586 100644
> --- a/drivers/cxl/cxlmem.h
> +++ b/drivers/cxl/cxlmem.h
> @@ -323,7 +323,7 @@ struct cxl_mbox_activate_fw {
>   
>   /* FW state bits */
>   #define CXL_FW_STATE_BITS		32
> -#define CXL_FW_CANCEL		BIT(0)
> +#define CXL_FW_CANCEL			0
>   
>   /**
>    * struct cxl_fw_state - Firmware upload / activation state