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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR11MB3260.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: d687a78a-21b2-4f15-5faf-08db7e29fe2c X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Jul 2023 14:05:02.5657 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Y4uKI966Uz2EU3UEu67DhINqFLT3Y+rKQTlaBQahBfSO8tK5Tw4xF80Cf33SxjfDcfgzUWubrGunfirz2ocg/Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR11MB7414 X-OriginatorOrg: intel.com X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Peter, > -----Original Message----- > From: Deng, Pan > Sent: Wednesday, June 28, 2023 12:13 AM > To: Peter Zijlstra ; Lu, Aaron > Cc: Chen, Tim C ; vincent.guittot@linaro.org; linux= - > kernel@vger.kernel.org; Li, Tianyou ; Ma, Yu > ; Zhu, Lipeng ; Chen, Yu C > ; Tim Chen > Subject: RE: [PATCH v2] sched/task_group: Re-layout structure to reduce > false sharing >=20 >=20 >=20 > > -----Original Message----- > > From: Peter Zijlstra > > Sent: Tuesday, June 27, 2023 6:15 PM > > To: Lu, Aaron > > Cc: Deng, Pan ; Chen, Tim C > > ; vincent.guittot@linaro.org; > > linux-kernel@vger.kernel.org; Li, Tianyou ; Ma, > > Yu ; Zhu, Lipeng ; Chen, Yu C > > ; Tim Chen > > Subject: Re: [PATCH v2] sched/task_group: Re-layout structure to > > reduce false sharing > > > > On Mon, Jun 26, 2023 at 01:47:56PM +0800, Aaron Lu wrote: > > > > > > diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h index > > > > ec7b3e0a2b20..4fbd4b3a4bdd 100644 > > > > --- a/kernel/sched/sched.h > > > > +++ b/kernel/sched/sched.h > > > > @@ -389,6 +389,19 @@ struct task_group { #endif #endif > > > > > > > > + struct rcu_head rcu; > > > > + struct list_head list; > > > > + > > > > + struct list_head siblings; > > > > + struct list_head children; > > > > + > > > > + /* > > > > + * To reduce false sharing, current layout is optimized to make > > > > + * sure load_avg is in a different cacheline from parent, rt_se > > > > + * and rt_rq. > > > > + */ > > > > That comment is misleading I think; you don't particularly care about > > those fields more than any other active fields that would cause false > sharing. > > >=20 > How about this one: > /* > * load_avg can also cause cacheline bouncing with parent, rt_se > * and rt_rq, current layout is optimized to make sure they are in > * different cachelines. > */ >=20 Does it work for you? Please feel free to drop any suggestion. > > > > + struct task_group *parent; > > > > + > > > > > > I wonder if we can simply do: > > > > > > diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h index > > > ec7b3e0a2b20..31b73e8d9568 100644 > > > --- a/kernel/sched/sched.h > > > +++ b/kernel/sched/sched.h > > > @@ -385,7 +385,9 @@ struct task_group { > > > * it in its own cacheline separated from the fields above which > > > * will also be accessed at each tick. > > > */ > > > - atomic_long_t load_avg ____cacheline_aligned; > > > + struct { > > > + atomic_long_t load_avg; > > > + } ____cacheline_aligned_in_smp; > > > #endif > > > #endif > > > > > > This way it can make sure there is no false sharing with load_avg no > > > matter how the layout of this structure changes in the future. > > > > This. Also, ISTR there was a series to split this atomic across nodes; > > whatever happend to that, and can we still measure an improvement over > > this with that approach? >=20 > I just ran unixbench context-switching in 1 node with 40C/80T, without th= is > change perf c2c data shows c2c bouncing is still there, perf record data > shows set_task_cpu takes ~4.5% overall cycles. With this change, that fal= se- > sharing is resolved, and set_task_cpu cycles drop to 0.5%. >=20 I mean even the only 1 NUMA node situation, this change benefits. Aaron posted his performance data of "split atomic across nodes" over this = patch=20 @https://lore.kernel.org/lkml/20230630093500.GA579792@ziqianlu-dell/,=20 looks they are complementary, so is it possible to merge this change firstl= y? Thanks Pan > Thanks > Pan