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Wysocki" , Zhang Rui , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org References: <20230706153823.201943-1-nfraprado@collabora.com> <20230706153823.201943-2-nfraprado@collabora.com> Content-Language: en-US From: Alexandre Mergnat In-Reply-To: <20230706153823.201943-2-nfraprado@collabora.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 06/07/2023 17:37, NĂ­colas F. R. A. Prado wrote: > There is a single IRQ handler for each LVTS thermal domain, and it is > supposed to check each of its underlying controllers for the origin of > the interrupt and clear its status. However due to a typo, only the > first controller was ever being handled, which resulted in the interrupt > never being cleared when it happened on the other controllers. Add the > missing index so interrupts are handled for all controllers. Reviewed-by: Alexandre Mergnat -- Regards, Alexandre