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[2620:137:e000::1:20]) by mx.google.com with ESMTP id e13-20020a17090ab38d00b00250888e039csi2915534pjr.62.2023.07.07.16.03.49; Fri, 07 Jul 2023 16:04:02 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=OBYCgSmV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232566AbjGGW5O (ORCPT + 99 others); Fri, 7 Jul 2023 18:57:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60504 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231799AbjGGW46 (ORCPT ); Fri, 7 Jul 2023 18:56:58 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A0F011992 for ; Fri, 7 Jul 2023 15:56:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1688770617; x=1720306617; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=40RBK7UEzMfh6s+/yIJhkN9+deAVJi5T19wOPusP9aM=; b=OBYCgSmV8jNink+T4OFXEL4Qi4vKbSwNyZuOHGmpKgNohAztcWOzkbLJ QSyeQPjeLDh4+2RoTMd3/skmo9e2Oq1KRck+8pWfLu9qriFwh/X6GDkap l7Z9Iwap6xc5HvSgbOtCGWmD7vNoL7v0LARkkLM3hG21mFj8g6Jnk1U+3 i4/dKeHs28Cuan0Gog0tEBf6FhPQ70KyGQ6JoYY040imVIClEFwqGlgft QUrTW9zZN+cyjrOm8q7moeL6Iq2i8kVJEZ9++Nxn3jdb8ZnQBYR7qVPwQ IS5bhvtbMrEDRTozvaYMswpLBw6JtF0/BILB2mjZBZ03vvRB5etr8QITE Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10764"; a="427683505" X-IronPort-AV: E=Sophos;i="6.01,189,1684825200"; d="scan'208";a="427683505" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jul 2023 15:56:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10764"; a="714176681" X-IronPort-AV: E=Sophos;i="6.01,189,1684825200"; d="scan'208";a="714176681" Received: from b04f130c83f2.jf.intel.com ([10.165.154.98]) by orsmga007.jf.intel.com with ESMTP; 07 Jul 2023 15:56:57 -0700 From: Tim Chen To: Peter Zijlstra Cc: Tim C Chen , Juri Lelli , Vincent Guittot , Ricardo Neri , "Ravi V . Shankar" , Ben Segall , Daniel Bristot de Oliveira , Dietmar Eggemann , Len Brown , Mel Gorman , "Rafael J . Wysocki" , Srinivas Pandruvada , Steven Rostedt , Valentin Schneider , Ionela Voinescu , x86@kernel.org, linux-kernel@vger.kernel.org, Shrikanth Hegde , Srikar Dronamraju , naveen.n.rao@linux.vnet.ibm.com, Yicong Yang , Barry Song , Chen Yu , Hillf Danton , Ricardo Neri Subject: [Patch v3 5/6] sched/x86: Add cluster topology to hybrid CPU Date: Fri, 7 Jul 2023 15:57:04 -0700 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Tim C Chen Cluster topology was not enabled on hybrid x86 CPU as load balance was not properly working for cluster domain. That has been fixed and cluster domain can be enabled for hybrid CPU. Reviewed-by: Ricardo Neri Signed-off-by: Tim Chen --- arch/x86/kernel/smpboot.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index cea297d97034..2489d767c398 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -575,6 +575,9 @@ static struct sched_domain_topology_level x86_hybrid_topology[] = { #ifdef CONFIG_SCHED_SMT { cpu_smt_mask, x86_smt_flags, SD_INIT_NAME(SMT) }, #endif +#ifdef CONFIG_SCHED_CLUSTER + { cpu_clustergroup_mask, x86_cluster_flags, SD_INIT_NAME(CLS) }, +#endif #ifdef CONFIG_SCHED_MC { cpu_coregroup_mask, x86_core_flags, SD_INIT_NAME(MC) }, #endif -- 2.32.0