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References: <20230710082515.54604-1-xujianghui@cdjrlc.com> <0cd737878affc60b7b34d58ea9e10e50@208suo.com>
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From:   Alex Deucher <alexdeucher@gmail.com>
Date:   Mon, 10 Jul 2023 13:25:30 -0400
Message-ID: <CADnq5_MAcyk=h8BebxrZ52n0Dsh3vj9PtjEUaD=PfDmhkej-cg@mail.gmail.com>
Subject: Re: [PATCH] drm/radeon: ERROR: "(foo*)" should be "(foo *)"
To:     sunran001@208suo.com
Cc:     airlied@gmail.com, daniel@ffwll.ch,
        dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
        linux-kernel@vger.kernel.org
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Applied.  Thanks!

On Mon, Jul 10, 2023 at 4:27=E2=80=AFAM <sunran001@208suo.com> wrote:
>
> Fix four occurrences of the checkpatch.pl error:
> ERROR: "(foo*)" should be "(foo *)"
>
> Signed-off-by: Ran Sun <sunran001@208suo.com>
> ---
>   drivers/gpu/drm/radeon/radeon_atombios.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c
> b/drivers/gpu/drm/radeon/radeon_atombios.c
> index bf3c411a55c5..85c4bb186203 100644
> --- a/drivers/gpu/drm/radeon/radeon_atombios.c
> +++ b/drivers/gpu/drm/radeon/radeon_atombios.c
> @@ -1389,7 +1389,7 @@ bool radeon_atombios_get_ppll_ss_info(struct
> radeon_device *rdev,
>
>           num_indices =3D (size - sizeof(ATOM_COMMON_TABLE_HEADER)) /
>               sizeof(ATOM_SPREAD_SPECTRUM_ASSIGNMENT);
> -        ss_assign =3D (struct _ATOM_SPREAD_SPECTRUM_ASSIGNMENT*)
> +        ss_assign =3D (struct _ATOM_SPREAD_SPECTRUM_ASSIGNMENT *)
>               ((u8 *)&ss_info->asSS_Info[0]);
>           for (i =3D 0; i < num_indices; i++) {
>               if (ss_assign->ucSS_Id =3D=3D id) {
> @@ -1402,7 +1402,7 @@ bool radeon_atombios_get_ppll_ss_info(struct
> radeon_device *rdev,
>                   ss->refdiv =3D ss_assign->ucRecommendedRef_Div;
>                   return true;
>               }
> -            ss_assign =3D (struct _ATOM_SPREAD_SPECTRUM_ASSIGNMENT*)
> +            ss_assign =3D (struct _ATOM_SPREAD_SPECTRUM_ASSIGNMENT *)
>                   ((u8 *)ss_assign + sizeof(struct
> _ATOM_SPREAD_SPECTRUM_ASSIGNMENT));
>           }
>       }
> @@ -3406,7 +3406,7 @@ static ATOM_VOLTAGE_OBJECT_V2
> *atom_lookup_voltage_object_v2(ATOM_VOLTAGE_OBJECT
>   {
>       u32 size =3D le16_to_cpu(v2->sHeader.usStructureSize);
>       u32 offset =3D offsetof(ATOM_VOLTAGE_OBJECT_INFO_V2,
> asVoltageObj[0]);
> -    u8 *start =3D (u8*)v2;
> +    u8 *start =3D (u8 *)v2;
>
>       while (offset < size) {
>           ATOM_VOLTAGE_OBJECT_V2 *vo =3D (ATOM_VOLTAGE_OBJECT_V2 *)(start=
 +
> offset);
> @@ -3423,7 +3423,7 @@ static ATOM_VOLTAGE_OBJECT_V3
> *atom_lookup_voltage_object_v3(ATOM_VOLTAGE_OBJECT
>   {
>       u32 size =3D le16_to_cpu(v3->sHeader.usStructureSize);
>       u32 offset =3D offsetof(ATOM_VOLTAGE_OBJECT_INFO_V3_1,
> asVoltageObj[0]);
> -    u8 *start =3D (u8*)v3;
> +    u8 *start =3D (u8 *)v3;
>
>       while (offset < size) {
>           ATOM_VOLTAGE_OBJECT_V3 *vo =3D (ATOM_VOLTAGE_OBJECT_V3 *)(start=
 +
> offset);