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[2620:137:e000::1:20]) by mx.google.com with ESMTP id nm4-20020a17090b19c400b00263f59430fasi1295933pjb.95.2023.07.11.02.38.54; Tue, 11 Jul 2023 02:39:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@siemens.com header.s=fm1 header.b=BtDkFxlA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=siemens.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232128AbjGKJV1 (ORCPT + 99 others); Tue, 11 Jul 2023 05:21:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231932AbjGKJVC (ORCPT ); Tue, 11 Jul 2023 05:21:02 -0400 Received: from mta-65-227.siemens.flowmailer.net (mta-65-227.siemens.flowmailer.net [185.136.65.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 441A02D72 for ; Tue, 11 Jul 2023 02:17:47 -0700 (PDT) Received: by mta-65-227.siemens.flowmailer.net with ESMTPSA id 2023071109174573b7a51eeab6294c8e for ; Tue, 11 Jul 2023 11:17:45 +0200 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=fm1; d=siemens.com; i=huaqian.li@siemens.com; h=Date:From:Subject:To:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding:Cc:References:In-Reply-To; bh=e9SD9YBZjnTBpPz3kT2lbToZg8m/zbYJHLT15YixKKw=; b=BtDkFxlARX0a6UDCjugj9rpamX49f2zA/RG8VgvWTDYdY2UphcXMTBO6pmBRskf0NvBDV5 4ZYKAp+GSkW1T7xNEbGeCWL2lNVRcGTovE2p9aRO86d7gPYn1mArlmQaOnSSiFfINVc+KUSF UHbCsLCoMacmCp5lQEXmtkFz20Meo=; From: huaqian.li@siemens.com To: wim@linux-watchdog.org, linux@roeck-us.net, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: huaqianlee@gmail.com, nm@ti.com, vigneshr@ti.com, kristo@kernel.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, jan.kiszka@siemens.com, baocheng.su@siemens.com, Li Hua Qian Subject: [PATCH v2 2/3] arm64: dts: ti: Add reserved memory for watchdog Date: Tue, 11 Jul 2023 17:17:12 +0800 Message-Id: <20230711091713.1113010-3-huaqian.li@siemens.com> In-Reply-To: <20230711091713.1113010-1-huaqian.li@siemens.com> References: <20230711091713.1113010-1-huaqian.li@siemens.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Flowmailer-Platform: Siemens Feedback-ID: 519:519-959203:519-21489:flowmailer X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H5,RCVD_IN_MSPIKE_WL, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Li Hua Qian This patch adds a reserved memory for the TI AM65X platform watchdog to reserve the specific info, triggering the watchdog reset in last boot, to know if the board reboot is due to a watchdog reset. Signed-off-by: Li Hua Qian --- arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi index e26bd988e522..77380e52a334 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi @@ -63,6 +63,12 @@ rtos_ipc_memory_region: ipc-memories@a2000000 { alignment = <0x1000>; no-map; }; + + /* To reserve the power-on(PON) reason for watchdog reset */ + wdt_reset_memory_region: wdt-memory@a2200000 { + reg = <0x00 0xa2200000 0x00 0x00001000>; + no-map; + }; }; leds { @@ -718,3 +724,8 @@ &mcu_r5fss0_core1 { <&mcu_r5fss0_core1_memory_region>; mboxes = <&mailbox0_cluster1>, <&mbox_mcu_r5fss0_core1>; }; + +&mcu_rti1 { + reg = <0x0 0x40610000 0x0 0x100>, + <0x0 0xa2200000 0x0 0x1000>; +}; -- 2.34.1