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mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Received: from DM6PR11MB4657.namprd11.prod.outlook.com (2603:10b6:5:2a6::7) by SA2PR11MB5068.namprd11.prod.outlook.com (2603:10b6:806:116::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6588.20; Wed, 12 Jul 2023 09:19:53 +0000 Received: from DM6PR11MB4657.namprd11.prod.outlook.com ([fe80::24bd:974b:5c01:83d6]) by DM6PR11MB4657.namprd11.prod.outlook.com ([fe80::24bd:974b:5c01:83d6%3]) with mapi id 15.20.6565.028; Wed, 12 Jul 2023 09:19:53 +0000 From: "Kubalewski, Arkadiusz" To: Jakub Kicinski CC: Jiri Pirko , "vadfed@meta.com" , "jonathan.lemon@gmail.com" , "pabeni@redhat.com" , "corbet@lwn.net" , "davem@davemloft.net" , "edumazet@google.com" , "vadfed@fb.com" , "Brandeburg, Jesse" , "Nguyen, Anthony L" , "M, Saeed" , "leon@kernel.org" , "richardcochran@gmail.com" , "sj@kernel.org" , "javierm@redhat.com" , "ricardo.canuelo@collabora.com" , "mst@redhat.com" , "tzimmermann@suse.de" , "Michalik, Michal" , "gregkh@linuxfoundation.org" , "jacek.lawrynowicz@linux.intel.com" , "airlied@redhat.com" , "ogabbay@kernel.org" , "arnd@arndb.de" , "nipun.gupta@amd.com" , "axboe@kernel.dk" , "linux@zary.sk" , "masahiroy@kernel.org" , "benjamin.tissoires@redhat.com" , "geert+renesas@glider.be" , "Olech, Milena" , "kuniyu@amazon.com" , "liuhangbin@gmail.com" , "hkallweit1@gmail.com" , "andy.ren@getcruise.com" , "razor@blackwall.org" , "idosch@nvidia.com" , "lucien.xin@gmail.com" , "nicolas.dichtel@6wind.com" , "phil@nwl.cc" , "claudiajkang@gmail.com" , "linux-doc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "netdev@vger.kernel.org" , "intel-wired-lan@lists.osuosl.org" , "linux-rdma@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , poros , mschmidt , "linux-clk@vger.kernel.org" , "vadim.fedorenko@linux.dev" Subject: RE: [RFC PATCH v9 00/10] Create common DPLL configuration API Thread-Topic: [RFC PATCH v9 00/10] Create common DPLL configuration API Thread-Index: AQHZpc/u2XBvfmJQckCFu+3HjTH4RK+edcOAgAF/xCCAACKYgIASxLqggAAmaYCAAXNRwIAAGjOAgAAtYHCAAF7igIAA2ZKg Date: Wed, 12 Jul 2023 09:19:53 +0000 Message-ID: References: <20230623123820.42850-1-arkadiusz.kubalewski@intel.com> <20230711131443.2a4af476@kernel.org> In-Reply-To: <20230711131443.2a4af476@kernel.org> Accept-Language: pl-PL, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR11MB4657.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 889b3cc2-3985-4a06-29d9-08db82b92705 X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Jul 2023 09:19:53.7979 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 8g3Bg/+DhyBHzG8jsJs7h1wKukyslvp0da0kGbhFR20Lgf0QIopyIdc6DTo7a3PMMhoOrzzgI2pOQlHcTHw1JERj/BRRUJsnnVWCYcTa910= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA2PR11MB5068 X-OriginatorOrg: intel.com X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >From: Jakub Kicinski >Sent: Tuesday, July 11, 2023 10:15 PM > >On Tue, 11 Jul 2023 17:17:51 +0000 Kubalewski, Arkadiusz wrote: >> >I think better to add the check to pin-register so future synce pin >> >users don't have similar weird ideas. Could you please add this check? >> >> Don't think it is way to go, and I don't think there is anything good >> with preventing device drivers from labeling their pins the way they >>want. > >We had a long argument about how label should have a clearly defined >meaning. We're not going to rehash it on every revision. What did I miss := | Well, as I understand we are discussing if dpll subsystem shall prevent labeling the SyncE type pins. I have labeled them in ice explicitly with the name of a pci device they belong to. You haven't miss much, mostly the problem is described in this thread. Thank you! Arkadiusz