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Date:   Wed, 12 Jul 2023 11:03:23 -0700
From:   Davidlohr Bueso <dave@stgolabs.net>
To:     Dan Carpenter <dan.carpenter@linaro.org>
Cc:     Vishal Verma <vishal.l.verma@intel.com>,
        Alison Schofield <alison.schofield@intel.com>,
        Ira Weiny <ira.weiny@intel.com>,
        Ben Widawsky <bwidawsk@kernel.org>,
        Dan Williams <dan.j.williams@intel.com>,
        Jonathan Cameron <Jonathan.Cameron@huawei.com>,
        Dave Jiang <dave.jiang@intel.com>, linux-cxl@vger.kernel.org,
        linux-kernel@vger.kernel.org, kernel-janitors@vger.kernel.org
Subject: Re: [PATCH] cxl/mem: Fix a double shift bug
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References: <a11b0c78-4717-4f4e-90be-f47f300d607c@moroto.mountain>
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On Mon, 03 Jul 2023, Dan Carpenter wrote:

>The CXL_FW_CANCEL macro is used with set/test_bit() so it should be a
>bit number and not the shifted value.  The original code is the
>equivalent of using BIT(BIT(0)) so it's 0x2 instead of 0x1.  This has
>no effect on runtime because it's done consistently and nothing else
>was using the 0x2 bit.
>
>Fixes: 9521875bbe00 ("cxl: add a firmware update mechanism using the sysfs firmware loader")
>Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>

Reviewed-by: Davidlohr Bueso <dave@stgolabs.net>