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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN9PR11MB5276.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 025c07cc-4d78-4fc3-9367-08db8376abd7 X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Jul 2023 07:56:31.4877 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: K04yV160vemBXAgptXc5V6CID3f57Z2q65sLPjzxedqhzWyNBvEuc0jMfpHzCQni2YV8/tz+m1du3lgD/cZZVw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR11MB5816 X-OriginatorOrg: intel.com X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > From: Jacob Pan > Sent: Thursday, July 13, 2023 12:34 AM >=20 >=20 > - /* > - * Should never reach here until we add support for attaching > - * non-SVA domain to a pasid. > - */ > - WARN_ON(1); > + dmar_domain =3D to_dmar_domain(domain); > + spin_lock_irqsave(&dmar_domain->lock, flags); > + list_for_each_entry(curr, &dmar_domain->dev_pasids, link_domain) > { > + if (curr->dev =3D=3D dev && curr->pasid =3D=3D pasid) { > + list_del(&curr->link_domain); > + dev_pasid =3D curr; > + break; > + } > + } > + spin_unlock_irqrestore(&dmar_domain->lock, flags); >=20 what about no matching dev_pasid is find? > + domain_detach_iommu(dmar_domain, iommu); > + kfree(dev_pasid); > out_tear_down: > intel_pasid_tear_down_entry(iommu, dev, pasid, false); > intel_drain_pasid_prq(dev, pasid); > } >=20 > +static int intel_iommu_set_dev_pasid(struct iommu_domain *domain, > + struct device *dev, ioasid_t pasid) > +{ > + struct device_domain_info *info =3D dev_iommu_priv_get(dev); > + struct dmar_domain *dmar_domain =3D to_dmar_domain(domain); > + struct intel_iommu *iommu =3D info->iommu; > + struct dev_pasid_info *dev_pasid; > + unsigned long flags; > + int ret; > + > + if (!pasid_supported(iommu) || dev_is_real_dma_subdevice(dev)) > + return -EOPNOTSUPP; > + > + if (context_copied(iommu, info->bus, info->devfn)) > + return -EBUSY; > + > + ret =3D prepare_domain_attach_device(domain, dev); > + if (ret) > + return ret; > + > + dev_pasid =3D kzalloc(sizeof(*dev_pasid), GFP_KERNEL); > + if (!dev_pasid) > + return -ENOMEM; > + > + ret =3D domain_attach_iommu(dmar_domain, iommu); > + if (ret) > + goto out_free; > + > + if (domain_type_is_si(dmar_domain)) > + ret =3D intel_pasid_setup_pass_through(iommu, dmar_domain, > + dev, pasid); > + else if (dmar_domain->use_first_level) > + ret =3D domain_setup_first_level(iommu, dmar_domain, > + dev, pasid); > + else > + ret =3D intel_pasid_setup_second_level(iommu, dmar_domain, > + dev, pasid); > + if (ret) > + goto out_detach_iommu; > + > + dev_pasid->dev =3D dev; > + dev_pasid->pasid =3D pasid; > + spin_lock_irqsave(&dmar_domain->lock, flags); > + list_add(&dev_pasid->link_domain, &dmar_domain->dev_pasids); > + spin_unlock_irqrestore(&dmar_domain->lock, flags); > + > + return 0; > +out_detach_iommu: > + domain_detach_iommu(dmar_domain, iommu); > +out_free: > + kfree(dev_pasid); > + return ret; > +} > + > const struct iommu_ops intel_iommu_ops =3D { > .capable =3D intel_iommu_capable, > .domain_alloc =3D intel_iommu_domain_alloc, > @@ -4777,6 +4869,7 @@ const struct iommu_ops intel_iommu_ops =3D { > #endif > .default_domain_ops =3D &(const struct iommu_domain_ops) { > .attach_dev =3D intel_iommu_attach_device, > + .set_dev_pasid =3D intel_iommu_set_dev_pasid, > .map_pages =3D intel_iommu_map_pages, > .unmap_pages =3D intel_iommu_unmap_pages, > .iotlb_sync_map =3D > intel_iommu_iotlb_sync_map, > diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h > index 6d94a29f5d52..68bb7cdf5543 100644 > --- a/drivers/iommu/intel/iommu.h > +++ b/drivers/iommu/intel/iommu.h > @@ -595,6 +595,7 @@ struct dmar_domain { >=20 > spinlock_t lock; /* Protect device tracking lists */ > struct list_head devices; /* all devices' list */ > + struct list_head dev_pasids; /* all attached pasids */ >=20 > struct dma_pte *pgd; /* virtual address */ > int gaw; /* max guest address width */ > @@ -717,6 +718,12 @@ struct device_domain_info { > struct pasid_table *pasid_table; /* pasid table */ > }; >=20 > +struct dev_pasid_info { > + struct list_head link_domain; /* link to domain siblings */ > + struct device *dev; /* the physical device */ > + ioasid_t pasid; /* PASID of the physical device */ > +}; the comment for dev/pasid is meaningless.