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[2620:137:e000::1:20]) by mx.google.com with ESMTP id w16-20020a170902e89000b001ae014d8d03si7197289plg.432.2023.07.14.04.18.57; Fri, 14 Jul 2023 04:19:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="l/YCVVho"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236265AbjGNKzd (ORCPT + 99 others); Fri, 14 Jul 2023 06:55:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51450 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236257AbjGNKzU (ORCPT ); Fri, 14 Jul 2023 06:55:20 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 11C2330FA; Fri, 14 Jul 2023 03:55:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1689332118; x=1720868118; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=npG2m1UCZxKCtzRaw5t5Am2kMO3bj0pf6Epbexb+5Ig=; b=l/YCVVhoV5MsCgATRO8qD3CfVL8fF3uEKPZ3ou9TCeMPNrzEMHF0AM6h PZNHcjX4O1H35cFGhl8N1d4N0TWvxohMgk4v6Zxv79kUrlqA1bUp/8+wP M+K/kVKr8u1bRUU4FGzKh9q0WUWThK44n1fNLhjQVumbTIYumPogzXgb8 zXlAOb1l5VgSB8rVwH4NHKDsqZxIRMj2SHXVYNZ9AAmTO6Z1T4pLKq4eG uzLFJGIv4v5ZANrz6YQP8nZBuX6h+x5kao5Y6hi+auIJyYdzAu6M6lLCB O2GDrc+FL6v7fZjgeB+KraRyowJegTVrKMMFA3uUCsGvyfd69eybTWtrG Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10770"; a="364321160" X-IronPort-AV: E=Sophos;i="6.01,205,1684825200"; d="scan'208";a="364321160" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jul 2023 03:55:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10770"; a="722365472" X-IronPort-AV: E=Sophos;i="6.01,205,1684825200"; d="scan'208";a="722365472" Received: from dev2 (HELO DEV2.igk.intel.com) ([10.237.148.94]) by orsmga002.jf.intel.com with ESMTP; 14 Jul 2023 03:55:14 -0700 From: =?UTF-8?q?Amadeusz=20S=C5=82awi=C5=84ski?= To: Bjorn Helgaas , Mark Brown , Takashi Iwai Cc: alsa-devel@alsa-project.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Cezary Rojewski , Pierre-Louis Bossart , Kai Vehmanen , Andy Shevchenko , Hans de Goede , =?UTF-8?q?Amadeusz=20S=C5=82awi=C5=84ski?= , Andy Shevchenko Subject: [PATCH v2 05/15] ALSA: hda: Add controller matching macros Date: Fri, 14 Jul 2023 20:56:05 +0200 Message-Id: <20230714185615.370597-6-amadeuszx.slawinski@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230714185615.370597-1-amadeuszx.slawinski@linux.intel.com> References: <20230714185615.370597-1-amadeuszx.slawinski@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DATE_IN_FUTURE_06_12, DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some HDA controllers require additional handling, so there are macros to match them, however those are spread across multiple files. Add them all in one place, so they can be reused. Reviewed-by: Andy Shevchenko Signed-off-by: Amadeusz Sławiński --- include/sound/hdaudio.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h index 2ffdf58bd6d4..32c59053b48e 100644 --- a/include/sound/hdaudio.h +++ b/include/sound/hdaudio.h @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -704,4 +705,29 @@ static inline unsigned int snd_array_index(struct snd_array *array, void *ptr) for ((idx) = 0, (ptr) = (array)->list; (idx) < (array)->used; \ (ptr) = snd_array_elem(array, ++(idx))) +/* + * Device matching + */ + +#define HDA_CONTROLLER_IS_HSW(pci) (pci_match_id((struct pci_device_id []){ \ + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_HSW_0) }, \ + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_HSW_2) }, \ + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_HSW_3) }, \ + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_BDW) }, \ + { } \ + }, pci)) + +#define HDA_CONTROLLER_IS_APL(pci) (pci_match_id((struct pci_device_id []){ \ + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_APL) }, \ + { } \ + }, pci)) + +#define HDA_CONTROLLER_IN_GPU(pci) (pci_match_id((struct pci_device_id []){ \ + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG1) }, \ + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG2_0) }, \ + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG2_1) }, \ + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG2_2) }, \ + { } \ + }, pci) || HDA_CONTROLLER_IS_HSW(pci)) + #endif /* __SOUND_HDAUDIO_H */ -- 2.34.1