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Subject: Re: [Patch v3 4/6] sched/fair: Consider the idle state of the whole
 core for load balance
From:   Tim Chen <tim.c.chen@linux.intel.com>
To:     Shrikanth Hegde <sshegde@linux.vnet.ibm.com>
Cc:     Ricardo Neri <ricardo.neri-calderon@linux.intel.com>,
        Juri Lelli <juri.lelli@redhat.com>,
        Vincent Guittot <vincent.guittot@linaro.org>,
        Ricardo Neri <ricardo.neri@intel.com>,
        "Ravi V . Shankar" <ravi.v.shankar@intel.com>,
        Ben Segall <bsegall@google.com>,
        Daniel Bristot de Oliveira <bristot@redhat.com>,
        Dietmar Eggemann <dietmar.eggemann@arm.com>,
        Len Brown <len.brown@intel.com>, Mel Gorman <mgorman@suse.de>,
        "Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
        Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
        Steven Rostedt <rostedt@goodmis.org>,
        Valentin Schneider <vschneid@redhat.com>,
        Ionela Voinescu <ionela.voinescu@arm.com>, x86@kernel.org,
        linux-kernel@vger.kernel.org,
        Srikar Dronamraju <srikar@linux.vnet.ibm.com>,
        naveen.n.rao@linux.vnet.ibm.com,
        Yicong Yang <yangyicong@hisilicon.com>,
        Barry Song <v-songbaohua@oppo.com>,
        Chen Yu <yu.c.chen@intel.com>, Hillf Danton <hdanton@sina.com>,
        Peter Zijlstra <peterz@infradead.org>
Date:   Fri, 14 Jul 2023 15:16:18 -0700
In-Reply-To: <29f8bc23-9b17-0a21-baa5-3eee1322f8f0@linux.vnet.ibm.com>
References: <cover.1688770494.git.tim.c.chen@linux.intel.com>
         <807bdd05331378ea3bf5956bda87ded1036ba769.1688770494.git.tim.c.chen@linux.intel.com>
         <29f8bc23-9b17-0a21-baa5-3eee1322f8f0@linux.vnet.ibm.com>
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On Fri, 2023-07-14 at 18:32 +0530, Shrikanth Hegde wrote:
>=20
>=20
>=20
> Tried on a symmetric system with all cores having SMT=3D4 as well. There =
was reduction in migrations here as well.
> Didnt observe any major regressions when microbenchmarks run alone. Such =
as hackbench, stress-ng.=20
>=20
> So. Here is tested-by.=20
> Tested-by: Shrikanth Hegde <sshegde@linux.vnet.ibm.com>

Thanks for testing. =20

>=20
>=20
> > +
> >  	/* Are we the first CPU of this group ? */
> >  	return group_balance_cpu(sg) =3D=3D env->dst_cpu;
> >  }
>=20
> One doubt though, Here a fully idle core would be chosen instead of first=
 idle cpu in the=20
> group (if there is one). Since coming out of idle of SMT is faster compar=
ed to a fully idle core,
> would latency increase? Or that concerns mainly wakeup path?

Yeah, I think that concern is for the wakeup path and not for the balance p=
ath.

Tim