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Message-ID: <9a3dc092-7278-cda1-cd4e-c157e0e2c431@linaro.org>
Date:   Mon, 17 Jul 2023 11:42:18 +0200
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Subject: Re: [PATCH] usb: dwc2: combine platform specific data for Intel
 Agilex and Stratix10
Content-Language: en-US
To:     Meng Li <Meng.Li@windriver.com>, gregkh@linuxfoundation.org,
        robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        conor+dt@kernel.org, dinguyen@kernel.org, hminas@synopsys.com,
        linux-usb@vger.kernel.org, devicetree@vger.kernel.org
Cc:     linux-kernel@vger.kernel.org
References: <20230717085053.1075077-1-Meng.Li@windriver.com>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
In-Reply-To: <20230717085053.1075077-1-Meng.Li@windriver.com>
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Precedence: bulk

On 17/07/2023 10:50, Meng Li wrote:
> Intel Stratix10 is very the same with Agilex platform, the DWC2 IP on
> the Stratix platform also does not support clock-gating. So, based on
> commit 3d8d3504d233("usb: dwc2: Add platform specific data for
> Intel's Agilex"), combine platform specific data for Intel Agilex and
> Stratix10 together. In additional, in order to avoid breaking the old
> device tree, keep compatible string "intel,socfpga-agilex-hsotg" unchanged.
> 
> Signed-off-by: Meng Li <Meng.Li@windriver.com>
> ---
>  Documentation/devicetree/bindings/usb/dwc2.yaml   | 2 ++

Bindings are always separate patch.

>  arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 4 ++--

As DTS is.

>  drivers/usb/dwc2/params.c                         | 6 ++++--
>  3 files changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml b/Documentation/devicetree/bindings/usb/dwc2.yaml
> index dc4988c0009c..c98ca98d5033 100644
> --- a/Documentation/devicetree/bindings/usb/dwc2.yaml
> +++ b/Documentation/devicetree/bindings/usb/dwc2.yaml
> @@ -51,6 +51,7 @@ properties:
>                - amlogic,meson-gxbb-usb
>                - amlogic,meson-g12a-usb
>                - intel,socfpga-agilex-hsotg
> +              - intel,socfpga-hsotg

Where is SoC specific compatible?

>            - const: snps,dwc2
>        - const: amcc,dwc-otg
>        - const: apm,apm82181-dwc-otg
> @@ -64,6 +65,7 @@ properties:
>            - const: snps,dwc2
>        - const: samsung,s3c6400-hsotg
>        - const: intel,socfpga-agilex-hsotg
> +      - const: intel,socfpga-hsotg
>  
>    reg:
>      maxItems: 1
> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> index ea788a920eab..c5a51636f657 100644
> --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi

...

> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
> index 8eab5f38b110..6bb27a24e9e1 100644
> --- a/drivers/usb/dwc2/params.c
> +++ b/drivers/usb/dwc2/params.c
> @@ -93,7 +93,7 @@ static void dwc2_set_s3c6400_params(struct dwc2_hsotg *hsotg)
>  	p->phy_utmi_width = 8;
>  }
>  
> -static void dwc2_set_socfpga_agilex_params(struct dwc2_hsotg *hsotg)
> +static void dwc2_set_socfpga_params(struct dwc2_hsotg *hsotg)

Why? Old name was ok...

>  {
>  	struct dwc2_core_params *p = &hsotg->params;
>  
> @@ -266,7 +266,9 @@ const struct of_device_id dwc2_of_match_table[] = {
>  	{ .compatible = "st,stm32mp15-hsotg",
>  	  .data = dwc2_set_stm32mp15_hsotg_params },
>  	{ .compatible = "intel,socfpga-agilex-hsotg",
> -	  .data = dwc2_set_socfpga_agilex_params },
> +	  .data = dwc2_set_socfpga_params },
> +	{ .compatible = "intel,socfpga-hsotg",
> +	  .data = dwc2_set_socfpga_params },

Aren't they compatible? Why do you need new entry for compatible devices?

Best regards,
Krzysztof