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Date:   Mon, 17 Jul 2023 15:39:17 +0200
From:   Greg KH <gregkh@linuxfoundation.org>
To:     Sricharan Ramabadhran <quic_srichara@quicinc.com>
Cc:     agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org,
        robh@kernel.org, mani@kernel.org, lpieralisi@kernel.org,
        bhelgaas@google.com, kw@linux.com, linux-arm-msm@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
        stable@vger.kernel.org
Subject: Re: [PATCH V4] PCI: qcom: Fixing broken pcie bring up for 2_3_3
 configs ops
Message-ID: <2023071729-shamrock-evidence-b698@gregkh>
References: <20230717065535.2065582-1-quic_srichara@quicinc.com>
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On Mon, Jul 17, 2023 at 12:25:35PM +0530, Sricharan Ramabadhran wrote:
> PARF_SLV_ADDR_SPACE_SIZE_2_3_3 macro is used for IPQ8074
> 2_3_3 post_init ops. PCIe slave addr size was initially set
> to 0x358, but was wrongly changed to 0x168 as a part of
> commit 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix from
> register definitions"). Fixing it, by using the right macro
> PARF_SLV_ADDR_SPACE_SIZE and remove the unused
> PARF_SLV_ADDR_SPACE_SIZE_2_3_3.

Note, you do have a full 72 columns to use, no need to make it smaller.

> Without this pcie bring up on IPQ8074 is broken now.

I do not understand, something that used to work now breaks, or this is
preventing a new chip from being "brought up"?

thanks,

greg k-h