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[83.9.29.181]) by smtp.gmail.com with ESMTPSA id z7-20020ac24187000000b004f26d63f823sm2873949lfh.237.2023.07.17.08.19.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jul 2023 08:19:30 -0700 (PDT) From: Konrad Dybcio Date: Mon, 17 Jul 2023 17:19:21 +0200 Subject: [PATCH 14/15] arm64: dts: qcom: sm6115: Add VDD_CX to GCC MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20230717-topic-branch_aon_cleanup-v1-14-27784d27a4f4@linaro.org> References: <20230717-topic-branch_aon_cleanup-v1-0-27784d27a4f4@linaro.org> In-Reply-To: <20230717-topic-branch_aon_cleanup-v1-0-27784d27a4f4@linaro.org> To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1689607149; l=758; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=teCmvh/mH8/+KIQ6w2EiUF+9FzEW2n4wijD09cbH2a4=; b=Z6lj84tCtOpwyb5JGxRB90l01ovLnN0ixjCPdiYSidGzkn9vehSp80TM9eBEPDZtKZiNTZMJx jHf11RCWkK0CDgzc5nJ9DXHOh81HZwyCwcG3HSLvDV8PIeemm2MGyUo X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The GCC block is mainly powered by VDD_CX. Describe that. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 839c60351240..29b5b388cd94 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -784,6 +784,7 @@ gcc: clock-controller@1400000 { reg = <0x0 0x01400000 0x0 0x1f0000>; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&sleep_clk>; clock-names = "bi_tcxo", "sleep_clk"; + power-domains = <&rpmpd SM6115_VDDCX>; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; -- 2.41.0