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Tue, 18 Jul 2023 04:17:32 -0700 (PDT) Received: from [10.72.112.40] ([43.228.180.230]) by smtp.gmail.com with ESMTPSA id k22-20020aa792d6000000b00682868714fdsm1369203pfa.95.2023.07.18.04.17.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 18 Jul 2023 04:17:32 -0700 (PDT) Message-ID: Date: Tue, 18 Jul 2023 19:17:26 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH v6 10/11] KVM: arm64: Invalidate the table entries upon a range Content-Language: en-US To: Raghavendra Rao Ananta , Oliver Upton , Marc Zyngier , James Morse , Suzuki K Poulose Cc: Paolo Bonzini , Sean Christopherson , Huacai Chen , Zenghui Yu , Anup Patel , Atish Patra , Jing Zhang , Colton Lewis , David Matlack , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-mips@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Gavin Shan References: <20230715005405.3689586-1-rananta@google.com> <20230715005405.3689586-11-rananta@google.com> From: Shaoqin Huang In-Reply-To: <20230715005405.3689586-11-rananta@google.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 7/15/23 08:54, Raghavendra Rao Ananta wrote: > Currently, during the operations such as a hugepage collapse, > KVM would flush the entire VM's context using 'vmalls12e1is' > TLBI operation. Specifically, if the VM is faulting on many > hugepages (say after dirty-logging), it creates a performance > penalty for the guest whose pages have already been faulted > earlier as they would have to refill their TLBs again. > > Instead, leverage kvm_tlb_flush_vmid_range() for table entries. > If the system supports it, only the required range will be > flushed. Else, it'll fallback to the previous mechanism. > > Signed-off-by: Raghavendra Rao Ananta > Reviewed-by: Gavin Shan Reviewed-by: Shaoqin Huang > --- > arch/arm64/kvm/hyp/pgtable.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c > index 5d14d5d5819a..5ef098af1736 100644 > --- a/arch/arm64/kvm/hyp/pgtable.c > +++ b/arch/arm64/kvm/hyp/pgtable.c > @@ -806,7 +806,8 @@ static bool stage2_try_break_pte(const struct kvm_pgtable_visit_ctx *ctx, > * evicted pte value (if any). > */ > if (kvm_pte_table(ctx->old, ctx->level)) > - kvm_call_hyp(__kvm_tlb_flush_vmid, mmu); > + kvm_tlb_flush_vmid_range(mmu, ctx->addr, > + kvm_granule_size(ctx->level)); > else if (kvm_pte_valid(ctx->old)) > kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu, > ctx->addr, ctx->level); -- Shaoqin