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Tue, 18 Jul 2023 04:17:08 -0700 (PDT) Received: from [10.72.112.40] ([43.228.180.230]) by smtp.gmail.com with ESMTPSA id l18-20020a170902eb1200b001a80ad9c599sm1576337plb.294.2023.07.18.04.17.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 18 Jul 2023 04:17:08 -0700 (PDT) Message-ID: <4f02d91a-acd8-afa5-03b0-fd8ec29328dd@redhat.com> Date: Tue, 18 Jul 2023 19:17:02 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH v6 09/11] KVM: arm64: Flush only the memslot after write-protect Content-Language: en-US To: Raghavendra Rao Ananta , Oliver Upton , Marc Zyngier , James Morse , Suzuki K Poulose Cc: Paolo Bonzini , Sean Christopherson , Huacai Chen , Zenghui Yu , Anup Patel , Atish Patra , Jing Zhang , Colton Lewis , David Matlack , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-mips@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Gavin Shan References: <20230715005405.3689586-1-rananta@google.com> <20230715005405.3689586-10-rananta@google.com> From: Shaoqin Huang In-Reply-To: <20230715005405.3689586-10-rananta@google.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 7/15/23 08:54, Raghavendra Rao Ananta wrote: > After write-protecting the region, currently KVM invalidates > the entire TLB entries using kvm_flush_remote_tlbs(). Instead, > scope the invalidation only to the targeted memslot. If > supported, the architecture would use the range-based TLBI > instructions to flush the memslot or else fallback to flushing > all of the TLBs. > > Signed-off-by: Raghavendra Rao Ananta > Reviewed-by: Gavin Shan Reviewed-by: Shaoqin Huang > --- > arch/arm64/kvm/mmu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c > index 387f2215fde7..985f605e2abc 100644 > --- a/arch/arm64/kvm/mmu.c > +++ b/arch/arm64/kvm/mmu.c > @@ -1082,7 +1082,7 @@ static void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot) > write_lock(&kvm->mmu_lock); > stage2_wp_range(&kvm->arch.mmu, start, end); > write_unlock(&kvm->mmu_lock); > - kvm_flush_remote_tlbs(kvm); > + kvm_flush_remote_tlbs_memslot(kvm, memslot); > } > > /** -- Shaoqin