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[83.9.29.181]) by smtp.gmail.com with ESMTPSA id d21-20020ac24c95000000b004db1a7e6decsm420016lfl.205.2023.07.18.05.49.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 18 Jul 2023 05:49:42 -0700 (PDT) Message-ID: Date: Tue, 18 Jul 2023 14:49:41 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH 04/15] clk: qcom: gcc-sm6375: Add runtime PM Content-Language: en-US To: Stephan Gerhold , Bjorn Andersson Cc: Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20230717-topic-branch_aon_cleanup-v1-0-27784d27a4f4@linaro.org> <20230717-topic-branch_aon_cleanup-v1-4-27784d27a4f4@linaro.org> From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 18.07.2023 14:07, Stephan Gerhold wrote: > On Mon, Jul 17, 2023 at 09:02:29PM -0700, Bjorn Andersson wrote: >> On Mon, Jul 17, 2023 at 06:26:35PM +0200, Stephan Gerhold wrote: >>> On Mon, Jul 17, 2023 at 05:19:11PM +0200, Konrad Dybcio wrote: >>>> The GCC block on SM6375 is powered by the VDD_CX rail. We need to ensure >>>> that it's enabled to prevent unwanted power collapse. >>>> >>>> Enable runtime PM to keep the power flowing only when necessary. >>>> >>> >>> Are you sure this is necessary? If VDD_CX was really possible to fully >>> "power collapse" then I would expect that you lose all register >>> settings. This is not something we want or can even handle for GCC. >>> You would need to restore all frequency settings, branch bits etc etc. >>> >> >> This differ between platforms, some allow us to completely power down CX >> while keeping registers state using MX, others require that CX stays in >> retention at least. >> >> So, CX isn't the only rail powering GCC. For the most part though, we >> have a relationship between frequencies votes for by clients and the >> corner of CX, and hence I think the current description is ok... >> > > This patch is just about sending enable/disable votes for the power > domains though, based on runtime PM which triggers when all the clocks > are disabled. > > It's unrelated to voting for CX corners required by certain clock > frequencies (we handle those in the OPP tables of the consumers). > And it's also unrelated to ensuring rentention of register contents > since we actually release all votes when the clocks are idle. > > So while adding runtime PM to all the clock drivers sounds nice, I'm > a bit confused what problem we're actually solving with this patch. :) In a very specific and unfortunate situation, there could be no other CX votes, and trying to access (perhaps at least parts of) GCC would result in a failure. Konrad