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Tue, 18 Jul 2023 13:58:29 +0000 Message-ID: <9275b613-3a9d-2de3-2f21-407e56c09622@intel.com> Date: Tue, 18 Jul 2023 15:56:45 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH RFC net-next v4 6/9] iavf: switch to Page Pool Content-Language: en-US To: Yunsheng Lin CC: Yunsheng Lin , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maciej Fijalkowski , Michal Kubiak , Larysa Zaremba , Alexander Duyck , David Christensen , "Jesper Dangaard Brouer" , Ilias Apalodimas , Paul Menzel , , , References: <20230705155551.1317583-1-aleksander.lobakin@intel.com> <20230705155551.1317583-7-aleksander.lobakin@intel.com> <6b8bc66f-8a02-b6b4-92cc-f8aaf067abd8@huawei.com> <4946b9df-66ea-d184-b97c-0ba687e41df8@gmail.com> <95c5ba92-bccd-6a9a-5373-606a482e36a3@intel.com> <558849ff-6b68-7547-cf99-36801ff24c25@huawei.com> From: Alexander Lobakin In-Reply-To: <558849ff-6b68-7547-cf99-36801ff24c25@huawei.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: BE1P281CA0028.DEUP281.PROD.OUTLOOK.COM (2603:10a6:b10:15::11) To DM6PR11MB3625.namprd11.prod.outlook.com (2603:10b6:5:13a::21) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6PR11MB3625:EE_|SA2PR11MB4972:EE_ X-MS-Office365-Filtering-Correlation-Id: 34b9fa14-7e2f-4754-4574-08db87971024 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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>>>>>> - int bi_size; >>>>>> + struct page_pool *pool; >>>>>> + >>>>>> + pool = libie_rx_page_pool_create(&rx_ring->q_vector->napi, >>>>>> + rx_ring->count); >>>>> >>>>> If a page is able to be spilt between more than one desc, perhaps the >>>>> prt_ring size does not need to be as big as rx_ring->count. >>>> >>>> But we doesn't know in advance, right? Esp. given that it's hidden in >>>> the lib. But anyway, you can only assume that in regular cases if you >>>> always allocate frags of the same size, PP will split pages when 2+ >>>> frags can fit there or return the whole page otherwise, but who knows >>>> what might happen. >>> >>> It seems intel driver is able to know the size of memory it needs when >>> creating the ring/queue/napi/pp, maybe the driver only tell the libie >>> how many descs does it use for queue, and libie can adjust it accordingly? >> >> But libie can't say for sure how PP will split pages for it, right? >> >>> >>>> BTW, with recent recycling optimization, most of recycling is done >>>> directly through cache, not ptr_ring. So I'd even say it's safe to start >>>> creating smaller ptr_rings in the drivers. >>> >>> The problem is that we may use more memory than before for certain case >>> if we don't limit the size of ptr_ring, unless we can ensure all of >>> recycling is done directly through cache, not ptr_ring. >> Also not sure I'm following =\ > > Before adding page pool support, the max memory used in the driver is as > below: > rx_ring->count * PAGE_SIZE; > > After adding page pool support, the max memory used in the driver is as > below: > > ptr_ring->size * PAGE_SIZE + > PP_ALLOC_CACHE_SIZE * PAGE_SIZE + > rx_ring->count * PAGE_SIZE / pp.init_arg I know. I was wondering how your message connects with what I said regarding that using direct recycling more aggressively allows us to reduce ptr_ring sizes, as e.g. on my setup ptr_ring is not used at all (it still will be in other cases, but a lot less often than before). > >> >> [...] >> >> Thanks, >> Olek >> >> . >> Thanks, Olek