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Date:   Tue, 18 Jul 2023 07:58:41 -0700
From:   Bjorn Andersson <andersson@kernel.org>
To:     Johan Hovold <johan+linaro@kernel.org>
Cc:     Andy Gross <agross@kernel.org>,
        Konrad Dybcio <konrad.dybcio@linaro.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>, linux-arm-msm@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
        stable@vger.kernel.org, Taniya Das <quic_tdas@quicinc.com>
Subject: Re: [PATCH 5/8] clk: qcom: lpasscc-sc7280: fix missing resume during
 probe
Message-ID: <xbek6yuldy7ck3zlux76hosn4iqt52ocydovuol7geiwapslrd@j7uyxhrkiyaw>
References: <20230718132902.21430-1-johan+linaro@kernel.org>
 <20230718132902.21430-6-johan+linaro@kernel.org>
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In-Reply-To: <20230718132902.21430-6-johan+linaro@kernel.org>
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On Tue, Jul 18, 2023 at 03:28:59PM +0200, Johan Hovold wrote:
> Drivers that enable runtime PM must make sure that the controller is
> runtime resumed before accessing its registers to prevent the power
> domain from being disabled.
> 

NB: the clock framework will runtime resume the controller surrounding
operations, even so during probe. But this is not done for resets and
gdscs - and in some clock drivers we poke registers directly from
probe...

The one time this really matters is where we associate the ahb clock
with the runtime state, e.g. in qcs404 turingcc. On most other platforms
we just mark these clocks always-on in gcc...

Regards,
Bjorn

> Fixes: 4ab43d171181 ("clk: qcom: Add lpass clock controller driver for SC7280")
> Cc: stable@vger.kernel.org      # 5.16
> Cc: Taniya Das <quic_tdas@quicinc.com>
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> ---
>  drivers/clk/qcom/lpasscc-sc7280.c | 16 ++++++++++++----
>  1 file changed, 12 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/clk/qcom/lpasscc-sc7280.c b/drivers/clk/qcom/lpasscc-sc7280.c
> index 0df2b29e95e3..e6b815aec46a 100644
> --- a/drivers/clk/qcom/lpasscc-sc7280.c
> +++ b/drivers/clk/qcom/lpasscc-sc7280.c
> @@ -118,9 +118,13 @@ static int lpass_cc_sc7280_probe(struct platform_device *pdev)
>  	ret = pm_clk_add(&pdev->dev, "iface");
>  	if (ret < 0) {
>  		dev_err(&pdev->dev, "failed to acquire iface clock\n");
> -		goto destroy_pm_clk;
> +		goto err_destroy_pm_clk;
>  	}
>  
> +	ret = pm_runtime_resume_and_get(&pdev->dev);
> +	if (ret)
> +		goto err_destroy_pm_clk;
> +
>  	if (!of_property_read_bool(pdev->dev.of_node, "qcom,adsp-pil-mode")) {
>  		lpass_regmap_config.name = "qdsp6ss";
>  		lpass_regmap_config.max_register = 0x3f;
> @@ -128,7 +132,7 @@ static int lpass_cc_sc7280_probe(struct platform_device *pdev)
>  
>  		ret = qcom_cc_probe_by_index(pdev, 0, desc);
>  		if (ret)
> -			goto destroy_pm_clk;
> +			goto err_put_rpm;
>  	}
>  
>  	lpass_regmap_config.name = "top_cc";
> @@ -137,11 +141,15 @@ static int lpass_cc_sc7280_probe(struct platform_device *pdev)
>  
>  	ret = qcom_cc_probe_by_index(pdev, 1, desc);
>  	if (ret)
> -		goto destroy_pm_clk;
> +		goto err_put_rpm;
> +
> +	pm_runtime_put(&pdev->dev);
>  
>  	return 0;
>  
> -destroy_pm_clk:
> +err_put_rpm:
> +	pm_runtime_put_sync(&pdev->dev);
> +err_destroy_pm_clk:
>  	pm_clk_destroy(&pdev->dev);
>  
>  	return ret;
> -- 
> 2.41.0
>